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STPMIC1APQR Datasheet(PDF) 103 Page - STMicroelectronics |
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STPMIC1APQR Datasheet(HTML) 103 Page - STMicroelectronics |
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103 / 140 page  6.5.5 Interrupt pending register 4 (INT_PENDING_R4) Table 52. INT_PENDING_R4 7 6 5 4 3 2 1 0 SWIN_RI SWIN_FA reserved reserved VINLOW_RI VINLOW_FA THW_RI THW_FA R R R R R R R R Address: 0x53 Type: read register only Default: 0x00 Description: interrupt pending register 4. Register is set to default on RSTn assertion For all bits: 0: IT not pending 1: IT pending [7] SWIN_RI: Voltage on SWIN pin (PWR_SW input) rises above SWIN_Rise threshold [6] SWIN_FA: Voltage on SWIN pin (PWR_SW input) falls below SWIN_Fall threshold [5 :4] reserved [3] VINLOW_RI: VIN drops below VINLOW_Rise threshold [2] VINLOW_FA: VIN rises above VINLOW_Fall threshold [1] THW_RI: Temperature rises above Twrn_Rise threshold [0] THW_FA: Temperature drops below Twrn_Fall threshold STPMIC1 Interrupt registers DS12792 - Rev 7 page 103/140 |
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