L6986I datasheet(35/60 Pages) STMICROELECTRONICS

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6.5

Design of the external components

6.5.1

Input capacitor selection

The input capacitor, just like in a standard buck, should limit the input voltage ripple. Key parameters of the input

capacitor are, together with its value, the maximum operating voltage and the RMS current capability.

The input capacitor voltage rating must be higher than the maximum input operating voltage of the application.

During the switching activity a pulsed current flows into the input capacitor and so its RMS current capability must

be selected accordingly with the application conditions. Internal losses of the input filter depends on the ESR

value so usually low ESR capacitors (like multilayer ceramic capacitors) have higher RMS current capability. On

the other hand, given the RMS current value, lower ESR input filter has lower losses and so contributes to higher

conversion efficiency.

The maximum RMS input current flowing through the capacitor can be calculated as:

IRMS=IOUT_pri+IOUT_secN∙ 1‐Dη∙Dη

(30)

In the ideal case of efficiency η = 1, the RMS current reaches its maximum value when D = 0.5.

In general, the maximum and minimum duty cycles can be calculated as:

DMAX= VOUT_pri+ΔVLS

VINmin+ΔVLS−ΔVHS

(31)

DMIN= VOUT_pri + ΔVLS

VINmax+ΔVLS−ΔVHS

(32)

Where ΔVHS and ΔVLS are the voltage drop across the high side and low side MOSFETs respectively.

The AC component of the input current (see figure below) flows in the input capacitor, generating the input voltage

ripple.

Figure 42. Input capacitor AC current

The peak to peak voltage across the input capacitor can be calculated as follows:

VPP= IOUT_pri+IOUT_sec∙NsecNpri

CIN∙fSW ∙Dη∙1−Dη +ESR∙IOUT_pri+IOUT_sec+∆IL2

(33)

In case of negligible ESR (e.g. in case of MLCC capacitors) the equation (33) can be simplified. The value of the

input capacitor can be so derived:

CIN = IOUT_pri+IOUT_sec∙NsecNpri

VPP∙fSW ∙Dη∙1−Dη

(34)

Considering the ideal case of η = 1, the equation above reaches its maximum value when D = 0.5. Therefore, the

minimum input capacitance value can be defined as follows:

L6986I

Design of the external components

DS13647 - Rev 1

page 35/60

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