Data Sheet

ADRF6821

Rev. A | Page 7 of 61

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

Closed-Loop Phase Noise

1 kHz offset

−102

dBc/Hz

10 kHz offset

−99

dBc/Hz

100 kHz offset

−114

dBc/Hz

950 kHz offset

−137

dBc/Hz

2.1 MHz offset

−144

dBc/Hz

3.5 MHz offset

−148

dBc/Hz

7.5 MHz offset

−153

dBc/Hz

10 MHz offset

−155

dBc/Hz

85 MHz offset

−156

dBc/Hz

Integrated Phase Noise

100 Hz to 10 MHz integration BW

0.2

°rms

1

Auxiliary LO output measurements are performed under a daisy-chain configuration with another ADRF6821 device. Measurements are taken from the auxiliary LO

output of the daisy chained ADRF6821.

DIGITAL LOGIC SPECIFICATIONS

The following specifications are for all digital inputs.

Table 5.

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max

Unit

LOGIC INPUT VOLTAGE

Low

0

0.5

V

High

1.2

3.6

V

LOGIC INPUT CURRENT

High

−100

+100

µA

Low

−100

+100

µA

LOGIC OUTPUT VOLTAGE

Low

0

0.4

V

High

When driving loads with complementary metal oxide

semiconductor (CMOS) 1.8 V interface

1.4

1.8

V

When driving loads with CMOS 3.3 V interface

2.4

3.3

V

LOGIC OUTPUT CURRENT

High Driving

1

2

mA

Low Driving

1

2

mA