| Electronic Components Datasheet Search |
|
PLL103-01XM Datasheet(PDF) 2 Page - PhaseLink Corporation |
|
|
|||||||||||||||||||||||||||||
PLL103-01XM Datasheet(HTML) 2 Page - PhaseLink Corporation |
|
2 / 7 page ![]() PLL103-01 Low Skew Buffers 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 03/08/00 Page 2 PIN DESCRIPTIONS Name Number Type Description SDRAM (0:3) 4,5,8,9 O SDRAM Byte0 Clock outputs. SDRAM (4:7) 13,14,17,18 O SDRAM Byte1 Clock outputs. SDRAM (8:11) 31,32,35,36 O SDRAM Byte2 Clock outputs. SDRAM (12:15) 40,41,44,45 O SDRAM Byte3 Clock outputs. SDRAM (16:17) 21,28 O SDRAM Byte4 Clock outputs. OE 38 I Tristates all outputs, active low. Has internal pull-up. BUF_IN 11 I Input for fanout buffers SDRAM (0:17). SDATA 24 B SCLK 25 I Serial data inputs for serial interface port. VDD 3,7,12,16,20,2 9,33,37,42,46 P 3.3V Power supply for SDRAM buffer. VDD1 23 P 3.3V Power supply for I2C circuitry. GND 6,10,15,19,22, 27,30,34,39,43 P Ground for SDRAM buffer. GND1 26 P Power supply for I2C circuitry. N/C 1,2,47,48 - Pins are internally disconnected. |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |