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ICS18051 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS18051 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 6 page ![]() ICS180-51 Low EMI Clock Generator MDS 180-51 A 1 Revision 110404 Integrated Circ uit Systems l5 25 Race Street, San Jo se, CA 9 512 6 l tel (408 ) 29 7-120 1 l www.ics t.co m Description The ICS180-51 generates a low EMI output clock from a clock or crystal input. The device uses ICS’ proprietary mix of analog and digital Phase-Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. The ICS180-51 offers center spread selection of +/-0.625% and +/-1.875%. Refer to the MK1714-01/02 for the widest selection of input frequencies and multipliers. ICS offers a complete line of EMI reducing clock generators. Consult us when you need to remove crystals and oscillators from your board. Features • Pin and function compatible to Cypress W180-51 • Packaged in 8-pin SOIC • Provides a spread spectrum output clock • Accepts a clock input and provides same frequency dithered output • Input frequency of 8 to 28 MHz • Peak reduction by 7dB - 14dB typical on 3rd - 19th odd harmonics • Spread percentage selection for +/-0.625% and +/-1.875% • Operating voltage of 3.3 V and 5 V • Advanced, low-power CMOS process Block Diagram PLL Clock Synthesis and Spread Spectrum Circuitry SS% CLK GND VDD FS2:1 X1/CLKIN X2 Clock Buffer/ Crystal Oscillator |
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