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STM32WL55JC Datasheet(PDF) 1 Page - STMicroelectronics |
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STM32WL55JC Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 147 page ![]() This is information on a product in full production. July 2021 DS13293 Rev 2 1/147 STM32WL55xx STM32WL54xx Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM Datasheet - production data Features Includes ST state-of-the-art patented technology Radio • Includes ST state-of -the-art patented technology • Frequency range: 150 MHz to 960 MHz • Modulation: LoRa®, (G)FSK, (G)MSK and BPSK • RX sensitivity: –123 dBm for 2-FSK (at 1.2 Kbit/s), –148 dBm for LoRa® (at 10.4 kHz, spreading factor 12) • Transmitter high output power, programmable up to +22 dBm • Transmitter low output power, programmable up to +15 dBm • Compliant with the following radio frequency regulations such as ETSI EN 300 220, EN 300 113, EN 301 166, FCC CFR 47 Part 15, 24, 90, 101 and the Japanese ARIB STD-T30, T-67, T-108 • Compatible with standardized or proprietary protocols such as LoRaWAN®, Sigfox™, W-MBus and more (fully open wireless system-on-chip) Ultra-low-power platform • 1.8 V to 3.6 V power supply • –40 °C to +105 °C temperature range • Shutdown mode: 31 nA (VDD = 3 V) • Standby (+ RTC) mode: 360 nA (VDD = 3 V) • Stop2 (+ RTC) mode: 1.07 µA (VDD = 3 V) • Active-mode MCU: < 72 µA/MHz (CoreMark®) • Active-mode RX: 4.82 mA • Active-mode TX: 15 mA at 10 dBm and 87 mA at 20 dBm (LoRa® 125 kHz) Core • 32-bit Arm® Cortex®-M4 CPU – Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 48 MHz, MPU and DSP instructions – 1.25 DMIPS/MHz (Dhrystone 2.1) • 32-bit Arm®Cortex®-M0+ CPU – Frequency up to 48 MHz, MPU – 0.95 DMIPS/MHz (Dhrystone 2.1) Security and identification • Hardware encryption AES 256-bit • True random number generator (RNG) • Sector protection against read/write operations (PCROP, RDP, WRP) • CRC calculation unit • Unique device identifier (64-bit UID compliant with IEEE 802-2001 standard) • 96-bit unique die identifier • Hardware public key accelerator (PKA) • Key management services • Secure sub-GHz MAC layer • Secure firmware update (SFU) • Secure firmware install (SFI) UFQFPN48 (7 x 7 mm) UFBGA73 (5 x 5 mm) WLCSP59 www.st.com |
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