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STM8L052C6 Datasheet(PDF) 18 Page - STMicroelectronics |
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STM8L052C6 Datasheet(HTML) 18 Page - STMicroelectronics |
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18 / 103 page ![]() Functional overview STM8L052C6 18/103 DocID023331 Rev 2 3.6 LCD (Liquid crystal display) The LCD is only available on STM8L052xx devices. The liquid crystal display drives up to 4 common terminals and up to 28 segment terminals to drive up to 112 pixels. Internal step-up converter to guarantee contrast control whatever VDD. Static 1/2, 1/3, 1/4 duty supported. Static 1/2, 1/3 bias supported. Phase inversion to reduce power consumption and EMI. Up to 4 pixels which can be programmed to blink. The LCD controller can operate in Halt mode. Note: Unnecessary segments and common pins can be used as general I/O pins. 3.7 Memories The medium-density value line STM8L052C6 has the following main features: 2 Kbytes of RAM The non-volatile memory is divided into three arrays: – 32 Kbytes of medium-density embedded Flash program memory – 256 bytes of data EEPROM – Option bytes The EEPROM embeds the error correction code (ECC) feature. It supports the read-while- write (RWW): it is possible to execute the code from the program matrix while programming/erasing the data matrix. The option byte protects part of the Flash program memory from write and readout piracy. 3.8 DMA A 4-channel direct memory access controller (DMA1) offers a memory-to-memory and peripherals-from/to-memory transfer capability. The 4 channels are shared between the following IPs with DMA capability: ADC1, I2C1, SPI1, USART1 and the four timers. |
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