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SPC58EHX Datasheet(PDF) 1 Page - STMicroelectronics |
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SPC58EHX Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 147 page  This is information on a product in full production. June 2021 DS12304 Rev 5 1/147 SPC58EHx, SPC58NHx SPC58 H Line - 32 bit Power Architecture automotive MCU Triple z4 cores 200 MHz, 10 MBytes Flash, HSM, ASIL-D Datasheet - production data Features • AEC-Q100 qualified • High performance e200z4 triple core: – 32-bit Power Architecture technology CPU – Core frequency as high as 200 MHz – Variable Length Encoding (VLE) – Floating Point, End-to-End Error Correction • 10496 KB (10240 KB code Flash + 256 KB data Flash) on-chip Flash memory: – Supports read during program and erase operations, and multiple blocks allowing EEPROM emulation – Supports read while read between the two code Flash partitions – Hardware support for Flash context switching (for FOTA with multi software versions) • 1088 KB on-chip general-purpose SRAM (in addition to 192 KB core local data RAM): – 64 KB in CPU_0, 64 KB in CPU_1 and 64 KB in CPU_2 • 224 KB HSM dedicated Flash memory (192 KB code + 32 KB data) • Multi-channel direct memory access controller (eDMA): – One eDMA with 64 channels – One eDMA with 16 channels • One interrupt controller (INTC) • Comprehensive new generation ASIL-D safety concept: – ASIL-D of ISO 26262 – One CPU channel in lockstep –Logic BIST – FCCU for collection and reaction to failure notifications – Memory BIST – Cyclic redundancy check (CRC) unit – Memory Error Management Unit (MEMU) for collection and reporting of error events in memories • Crossbar switch architecture for concurrent access to peripherals, Flash, or RAM from multiple bus masters with end-to-end ECC • Body cross triggering unit (BCTU): – Triggers ADC conversions from any eMIOS channel – Triggers ADC conversions from up to 2 dedicated PIT_RTIs • Enhanced modular IO subsystem (eMIOS): – up to 96 timed IO channels with 16-bit counter resolution • Enhanced analog-to-digital converter system with: – 4 independent fast 12-bit SAR analog converters – One supervisor 12-bit SAR analog converter – One standby 10-bit SAR analog converter – 100 ADC channels • Communication interfaces: – 24 LINFlexD modules – 10 deserial serial peripheral interface (DSPI) modules – 1 deserial serial peripheral interface (DSPI_LP) module available in low power mode eTQFP144 (20 x 20 x 1.0 mm) FPBGA302 (17 x 17 x 1.8 mm) eLQFP176 (24 x 24 x 1.4 mm) FPBGA386 (19 x 19 x 1.8 mm) www.st.com |
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