STA369BWSTR datasheet(22/92 Pages) STMICROELECTRONICS

22 / 92 page

I2C bus specification

STA369BWS

22/92

DocID016861 Rev 7

6.3

Write operation

Following the START condition the master sends a device select code with the RW bit set

to 0. The STA369BWS acknowledges this and then waits for the byte of internal address.

After receiving the internal byte address the STA369BWS again responds with an

acknowledgement.

6.3.1

Byte write

In the byte write mode the master sends one data byte, this is acknowledged by the

STA369BWS. The master then terminates the transfer by generating a STOP condition.

6.3.2

Multi-byte write

The multi-byte write modes can start from any internal address. The master generating a

STOP condition terminates the transfer.

Figure 9. Write mode sequence

6.4

Read operation

6.4.1

Current address byte read

Following the START condition the master sends a device select code with the RW bit set

to 1. The STA369BWS acknowledges this and then responds by sending one byte of data.

The master then terminates the transfer by generating a STOP condition.

6.4.2

Current address multi-byte read

The multi-byte read modes can start from any internal address. Sequential data bytes are

read from sequential addresses within the STA369BWS. The master acknowledges each

data byte read and then generates a STOP condition terminating the transfer.

6.4.3

Random address byte read

Following the START condition the master sends a device select code with the RW bit set

to 0. The STA369BWS acknowledges this and then the master writes the internal address

byte. After receiving, the internal byte address the STA369BWS again responds with an

acknowledgement. The master then initiates another START condition and sends the device

select code with the RW bit set to 1. The STA369BWS acknowledges this and then

responds by sending one byte of data. The master then terminates the transfer by

generating a STOP condition.

STA369BWSTR Datasheet(PDF) 22 Page - STMicroelectronics