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STM32WB15CC Datasheet(PDF) 31 Page - STMicroelectronics |
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STM32WB15CC Datasheet(HTML) 31 Page - STMicroelectronics |
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31 / 127 page  2. The Flash memory controller can be placed in power-down mode if the RF subsystem is not in use and all the program is run from the SRAM. 3. The SRAM1 and SRAM2 clocks can be gated off independently. 4. HSE (32 MHz) automatically used when RF activity is needed by the RF subsystem. 5. HSI16 (16 MHz) automatically used by some peripherals. 6. U(S)ART and LPUART reception is functional in Stop mode, and generates a wakeup interrupt on Start, Address match or Received frame event. 7. I2C address detection is functional in Stop mode, and generates a wakeup interrupt in case of address match. 8. I/Os with wakeup from Standby/Shutdown capability: PA0, PA2. 9. I/Os can be configured with internal pull-up, pull-down or floating but the configuration is lost immediately when exiting the Shutdown mode. |
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