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STM8S007C8 Datasheet(PDF) 10 Page - STMicroelectronics |
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STM8S007C8 Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 93 page  Block diagram STM8S007C8 10/93 DS8633 Rev 6 3 Block diagram Figure 1. STM8S007C8 value line block diagram MS61103V1 Reset block Reset POR BOR Clock controller Detector RC int. 16 MHz RC int. 128 kHz XTAL 1-24 MHz STM8 core Debug / SWIM SPI UART1 UART3 ADC2 Window WDG Independent WDG 64 Kbyte high density program Flash 128 byte data EEPROM 6 Kbyte RAM 16-bit advanced control timer (TM1) 16-bit general purpose timers (TIM2, TIM3) 8-bit basic timer (TIM4) AWU timer Clock to peripherals and core 16 channels Master/slave autosynchro LIN master SPI emul. 10 Mbit/s Single wire debug interface Up to 5 CAPCPOM channels Up to 4 CAPCOM channels + 3 complementary outputs I2C 400 Kbit/s Beeper 1/2/4 kHz beep Boot ROM |
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