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STM32F103RCT6 Datasheet(PDF) 89 Page - STMicroelectronics |
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STM32F103RCT6 Datasheet(HTML) 89 Page - STMicroelectronics |
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89 / 143 page ![]() DS5792 Rev 13 89/143 STM32F103xC, STM32F103xD, STM32F103xE Electrical characteristics 135 5.3.14 I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 46 are derived from tests performed under the conditions summarized in Table 10. All I/Os are CMOS and TTL compliant. All I/Os are CMOS and TTL compliant (no software configuration required). Their characteristics cover more than the strict CMOS-technology or TTL parameters. The coverage of these requirements is shown in Figure 42 and Figure 43 for standard I/Os, and in Figure 44 and Figure 45 for 5 V tolerant I/Os. Table 46. I/O static characteristics Symbol Parameter Conditions Min Typ Max Unit VIL Standard IO input low level voltage - –0.3 - 0.28*(VDD-2 V)+0.8 V V IO FT(1) input low level voltage –0.3 - 0.32*(VDD-2 V)+0.75 V V VIH Standard IO input high level voltage - 0.41*(VDD-2 V)+1.3 V -VDD+0.3 V IO FT(1) input high level voltage VDD > 2 V 0.42*(VDD-2 V)+1 V - 5.5 V VDD ≤2 V 5.2 Vhys Standard IO Schmitt trigger voltage hysteresis(2) - 200 - - mV IO FT Schmitt trigger voltage hysteresis(2) 5% VDD(3) -- mV Ilkg Input leakage current (4) VSS ≤VIN ≤VDD Standard I/Os -- ±1 µA VIN= 5 V, I/O FT -- 3 RPU Weak pull-up equivalent resistor(5) VIN = VSS 30 40 50 k Ω RPD Weak pull-down equivalent resistor(5) VIN = VDD 30 40 50 k Ω CIO I/O pin capacitance - - 5 - pF 1. FT = Five-volt tolerant. In order to sustain a voltage higher than VDD+0.3 the internal pull-up/pull-down resistors must be disabled. 2. Hysteresis voltage between Schmitt trigger switching levels. Guaranteed by characterization results. 3. With a minimum of 100 mV. 4. Leakage could be higher than max. if negative current is injected on adjacent pins. 5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This MOS/NMOS contribution to the series resistance is minimum (~10% order) . |
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