ADF4377 datasheet(65/79 Pages) AD

65 / 79 page

Data Sheet

ADF4377

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Rev. 0 | 65 of 79

Table 79. Bit Descriptions for REG0028

Bits

Bit Name

Description

Reset

Access

[6:0]

SYNTH_LOCK_TIMEOUT[14:8]

Timeout for the Calibration DAC Settling Time During a VCO Calibration. Determined

by Equation 13 in the VCO Calibration section.

0x0

R/W

Address: 0x29, Reset: 0x00, Name: REG0029

Figure 143.

Table 80. Bit Descriptions for REG0029

Bits

Bit Name

Description

Reset

Access

[7:0]

VCO_ALC_TIMEOUT[7:0]

Timeout for Automatic Level Control (ALC) Algorithm During VCO Calibration. Determined by

Equation 13 in the VCO Calibration section.

0x0

R/W

Address: 0x2A, Reset: 0x00, Name: REG002A

Figure 144.

Table 81. Bit Descriptions for REG002A

Bits

Bit Name

Description

Reset

Access

DEL_CTRL_DB

Enables Double Buffering for the R_DEL, N_DEL, INV_CLKOUT, BLEED_I, and

BLEED_POL Bit Fields.

0x0

R/W

0: disabled.

1: enabled.

[6:0]

VCO_ALC_TIMEOUT[14:8]

Timeout for Automatic Level Control (ALC) Algorithm During VCO Calibration. Determined by

Equation 13 in the VCO Calibration section.

0x0

R/W

Address: 0x2B, Reset: 0x00, Name: REG002B

Figure 145.

Table 82. Bit Descriptions for REG002B

Bits

Bit Name

Description

Reset

Access

[7:0]

R02B_RSV1[7:0]

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

Address: 0x2C, Reset: 0x00, Name: REG002C

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