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KTZ8866

January 2022 - Revision 04b

Page 21 of 37

Company Confidential

Backlight PWM Hysteresis

In backlight mode, if PWM dimming frequency is high and PWM dimming duty cycle is low, even the internal fast

20MHz sampling clock’s sampling error can be sufficient to cause the output LED current jitter. KTZ8866

implements PWM hysteresis control to minimize the jitter. It can be programmed by register 0x03 bits [2:0]. The

input PWM duty cycle is converted to an internal 11-bit digital value, this PWM hysteresis decides how many

LSBs of this 11-bit digital value is changed before the output LED current can follow the change. When PWM

duty

cycle changes in the same direction, no hysteresis exists. Only when the PWM duty cycle’s change starts

to go in different direction, does the hysteresis starts to take effect, and only when the change is larger or equal

to the number of LSBs programmed, the output LED current starts to follow the change. Table 2 shows the

relationship between the minimum LSB(s) and the PWM duty cycle hysteresis. Table 3 summarizes register

0x03 bits [2:0

]’s minimum setting to prevent jitter under different input PWM frequency conditions. The drawback

of setting PWM hysteresis too high is that the output current becomes less accurate due to the hysteresis.

Table 2. PWM Hysteresis

PWM Register

0x03 Bits [2:0]

Minimum

LSB(s)

PWM Duty

Cycle

Hysteresis

000

0

0/2047 = 0%

001

2

2/2047 = 0.10%

010

4

4/2047 = 0.20%

011

6

6/2047 = 0.29%

100

8

8/2047 = 0.39%

101

10

10/2047 = 0.48%

110

12

12/2047 = 0.59%

111

14

14/2047 = 0.68%

Table 3. Register 0x03 Bits

[2:0]’s Minimum Setting

PWM Dimming

Frequency (kHz)

Sampling Error

Register 0x03 Bits [2:0

]’s

Minimum Setting to Prevent Jitter

0.1

0.0005%

001

1

0.005%

001

5

0.025%

001

10

0.05%

001

20

0.1%

010

40

0.2%

011

100

0.5%

110

Turn On/Off Ramp

When

backlight mode is enabled from standby mode or disabled to standby mode, the LED current waveform’s

turn on/off time is controlled by Turn On/Off Ramp Register 0x14 bits [7:4] and bits [3:0] respectively. The 16

options range from 512µs to 16384ms, with 8ms as default. The shape of the turn on/off ramp in backlight mode

can also be programmed as exponential or linear through the Register 0x02 bit [1], with linear as default.

LED Fault Protection

Each current sink is protected against LED short or open conditions. The outcome of LED short event depends

on the setting of LED_SHORT_MODE bit in register 0x10. If it is

‘1’ and LED short circuit condition arises, the

current sink continues to regulate until VSINK > VSOV. When any sink node voltage goes above VSOV (6V) for more

than 59ms (typ.), LED_SHORT flag will be set in 0x0F and

that channel’s current sink will be turned off, and the

other channel(s) will continue to work if they don’t trigger this fault condition. If it is ‘0’, the LED_SHORT flag will

be set in 0x0F when VSINK > VSOV more than 59ms(typ.) is detected, but KTZ8866 will keep working as usual

without turning off the shorted

channel’s current sink until it reaches thermal shutdown.