STV8130B datasheet(6/9 Pages) STMICROELECTRONICS

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STV8130A/STV8130B

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CIRCUIT DESCRIPTION

The STV8130A and STV8130B are dual voltage

regulators with Reset and Disable.

The two regulation parts are supplied from one

voltage reference circuit trimmed by zener zap

during EWS testing. Since the supply voltage of

this last is connected at Pin 1 (VIN1) in STV8130A,

regulator 2 will not work if Pin 1 is not supplied.

In STV8130B, the two regulators are supplied by

pin 1.

The output stages have been designed in a dar-

lington configuration with a typical drop of 1.2V.

The adjustable voltage of Output 2 is defined by

output bridge resistors (R1, R2): the values of

these resistors are calculated to obtain, with the

targetted value for V02, the Vref voltage (2.44V)

on the median point connected to PROGRAM (Pin

7 for STV8130A or Pin 6 for STV8130B).

The disable circuit switches off Output 2 if a volt-

age of less than 0.8V is applied at Pin 4

(STV8130A) or Pin 3 (STV8130B).

The Reset circuit checks the voltage at Output 1. If

this drops below VOUT - 0.20V (3.10V Typ.), then

the first comparator “a” (see Figure 1) rapidly dis-

charges the Capacitor Ce and the reset output im-

mediately drops to low. This drop can be caused

by a parasitic loading condition on Out 1 or by a

too low value of VIN (short powering off). Once the

voltage at Out 1 rises above VOUT -0.15V (3.15V

Typ.), voltage VCe increases linearly to 2.44V cor-

responding to delay tD following the law below

(see Figure 2), then the reset output becomes high

again.

To avoid problems with the reset output, the sec-

ond comparator “b” has a large hysteresis (1.9V).

TYPICAL APPLICATION

2.44V

()

µA

----------------------------------

ref

--------------------

with Vref = 2.44V

STV8130A

0.1µF

RESET

VIN1

VIN2

V01

V02

C1 to C4 = 10µF

DISABLE

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