Philips Semiconductors

Product specification

74ALVT16841

2.5V/3.3V 20-bit bus interface latch (3-State)

1998 Feb 13

4

PIN DESCRIPTION

PIN NUMBER

SYMBOL

FUNCTION

55, 54, 52, 51, 49,

48, 47, 45, 44, 43

42, 41, 40, 38, 37,

36, 34, 33, 31, 30

1D0 – 1D9

2D0 – 2D9

Data inputs

2, 3, 5, 6, 8, 9, 10,

12, 13, 14

15, 16, 17, 19, 20,

21, 23, 24, 26, 27

1Q0 – 1Q9

2Q0 – 2Q9

Data outputs

1, 28

1OE, 2OE

Output enable inputs

(active-Low)

56, 29

1LE, 2LE

Latch enable inputs

(active rising edge)

4, 11, 18, 25, 32,

39, 46, 53

GND

Ground (0V)

7, 22, 35, 50

Positive supply

voltage

FUNCTION TABLE

INPUTS

OUTPUTS

OPERATING MODE

nOE

nLE

nDx

nQ0 – nQ9

OPERATING MODE

L

L

H

H

L

H

L

H

Transparent

L

L

↓

↓

l

h

L

H

Latched

H

X

X

Z

High impedance

L

L

X

NC

Hold

H = High voltage level

h

= High voltage level one set-up time prior to the High-to-Low LE

transition

L

= Low voltage level

l

= Low voltage level one set-up time prior to the High-to-Low LE

transition

↓ = High-to-Low LE transition

NC= No change

X = Don’t care

Z = High impedance “off” state

LOGIC DIAGRAM

LQ

D

nD0

nQ0

nLE

nOE

D

nD1

nQ1

D

nD2

nQ2

D

nD3

nQ3

D

nD4

nQ4

D

nD5

nQ5

D

nD6

nQ6

D

nD7

nQ7

D

nD8

nQ8

D

nD9

nQ9

SH00024

L

Q

L

Q

LQ

LQ

L

Q

LQ

LQ

L

Q

LQ