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MCP6S93 Datasheet(PDF) 1 Page - Microchip Technology

Part # MCP6S93
Description  Single-Ended, Rail-to-Rail I/O, Low-Gain PGA
PDF  40 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP6S93 Datasheet(HTML) 1 Page - Microchip Technology

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 2004 Microchip Technology Inc.
DS21908A-page 1
MCP6S91/2/3
Features
• Multiplexed Inputs: 1 or 2 channels
• 8 Gain Selections:
- +1, +2, +4, +5, +8, +10, +16 or +32 V/V
• Serial Peripheral Interface (SPI)
• Rail-to-Rail Input and Output
• Low Gain Error: ±1% (max.)
• Offset Mismatch Between Channels: 0 µV
• High Bandwidth: 1 to 18 MHz (typ.)
• Low Noise: 10 nV/
√Hz @ 10 kHz (typ.)
• Low Supply Current: 1.0 mA (typ.)
• Single Supply: 2.5V to 5.5V
• Extended Temperature Range: -40°C to +125°C
Typical Applications
• A/D Converter Driver
• Multiplexed Analog Applications
• Data Acquisition
• Industrial Instrumentation
• Test Equipment
• Medical Instrumentation
Block Diagram
Description
The Microchip Technology Inc. MCP6S91/2/3 are
analog Programmable Gain Amplifiers (PGAs). They
can be configured for gains from +1 V/V to +32 V/V and
the input multiplexer can select one of up to two chan-
nels through a SPI port. The serial interface can also
put the PGA into shutdown to conserve power. These
PGAs are optimized for high-speed, low offset voltage
and single-supply operation with rail-to-rail input and
output capability. These specifications support single-
supply applications needing flexible performance or
multiple inputs.
The one-channel MCP6S91 and the two-channel
MCP6S92 are available in 8-pin PDIP, SOIC and MSOP
packages. The two-channel MCP6S93 is available in a
10-pin MSOP package. All parts are fully specified from
-40°C to +125°C.
Package Types
VOUT
VREF
VDD
CS
SI
SO
SCK
CH1
CH0
VSS
8
RF
RG
MUX
SPI™
Logic
Gain
Switches
VREF
CH0
VSS
SI
SCK
1
2
3
4
8
7
6
5
VDD
CS
VOUT
MCP6S91
PDIP, SOIC, MSOP
CH1
CH0
VSS
SI
SCK
1
2
3
4
8
7
6
5
VDD
CS
VOUT
MCP6S92
PDIP, SOIC, MSOP
CH0
VOUT
CH1
CS
1
2
3
4
10
9
8
7SI
SCK
56
VREF
VDD
SO
VSS
MCP6S93
MSOP
Single-Ended, Rail-to-Rail I/O, Low-Gain PGA


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