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STE2004 Datasheet(PDF) 29 Page - STMicroelectronics

Part # STE2004
Description  102 X 65 SINGLE CHIP LCD CONTROLLER / DRIVER
PDF  66 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STE2004 Datasheet(HTML) 29 Page - STMicroelectronics

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STE2004
the eighth SCLK clock pulse during every byte transfer.
If CS stays low after the last bit of a command/data byte, the serial interface expects the MSB of the next byte
at the next SCLK positive edge.
A reset pulse on RES pin interrupts the transmission. No data is written into the data RAM and all the internal
registers are cleared.
If CS is low after the positive edge of RES, the serial interface is ready to receive data.
Throughout SDOUT can be read the driver I2C slave address or the status byte. The Command sequence that
allows to read I2C slave address or Status byte is reported in Fig. 34 & 35. SDOUT is in High impedance in
steady state and during data write.
It is possible to short circuit SDOUT and SDIN and read I2C address or status Byte without any additional lines.
Figure 34. 4-lines serial bus protocol - one byte transmission
Figure 35. 4-lines serial bus protocol - several byte transmission
Figure 36. 4-lines serial bus protocol - I2C Address or Status Byte Read
MSB
LSB
D/C
CS
SDIN
SCLK
LR0071
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DB7
DB6
DB5
D/C
CS
SDIN
SCLK
LR0072
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Don't
Care
CS
SDIN
SCLK
High-Z
DB1
DB0
High-Z
Don't
Care
Don't
Care
Don't
Care
Don't
Care
Don't
Care
Don't
Care
Don't
Care
Command Write
DATA Read
DB7
DB6
DB5
DB4
DB3
DB2
SDOUT
High-Z
DB1
DB0
High-Z
DB7
DB6
DB5
DB4
DB3
DB2
ID Number
STATUS BYTE
LR00076
D/C



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