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STM32H7B0IB Datasheet(PDF) 106 Page - STMicroelectronics

Part # STM32H7B0IB
Description  32-bit Arm® Cortex®-M7 280 MHz MCUs, 128-Kbyte Flash memory, 1.4-Mbyte RAM, 46 com. and analog interfaces, SMPS, crypto
PDF  205 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H7B0IB Datasheet(HTML) 106 Page - STMicroelectronics

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Table 69. NRST pin characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RPU(1)
Weak pull-up equivalent resistor(2)
VIN = VSS
30
40
50
㏀
VF(NRST)(1)
NRST Input filtered pulse
1.71 V < VDD < 3.6 V
-
-
50
ns
VNF(NRST)(1)
NRST Input not filtered pulse
1.71 V < VDD < 3.6 V
350
-
-
1.62 V < VDD < 3.6 V
1000
-
-
1. Guaranteed by design.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series
resistance must be minimum (~10%).
Figure 26. Recommended NRST pin protection
STM32
R PU
NRST (2)
VDD
Filter
Internal Reset
0.1 µF
External
reset circuit (1)
1.
The reset network protects the device against parasitic resets.
2.
The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 63. I/O static characteristics. Otherwise the reset is not taken into account by the device.
6.3.18
FMC characteristics
Unless otherwise specified, the parameters given in the below tables for the FMC interface are derived from tests
performed under the ambient temperature, fHCLK frequency and VDD supply voltage conditions summarized in
Table 20. General operating conditions, with the following configuration:
•
Output speed is set to OSPEEDRy[1:0] = 11
•
Measurement points are done at CMOS levels: 0.5VDD
•
IO Compensation cell activated.
•
HSLV activated when VDD ≤ 2.7 V
•
VOS level set to VOS0.
Note:
At VOS1, the performance in some FMC modes can be degraded by up to 5 % compared to VOS0. This is
indicated by a footnote when applicable.
Refer to Section 6.3.16 I/O port characteristics for more details on the input/output alternate function
characteristics.
Asynchronous waveforms and timings
Figure 27 through Figure 29 represent asynchronous waveforms and Table 70 through Table 77 provide the
corresponding timings. The results shown in these tables are obtained with the following FMC configuration:
•
AddressSetupTime = 0x1
•
AddressHoldTime = 0x1
•
DataSetupTime = 0x1 (except for asynchronous NWAIT mode , DataSetupTime = 0x5)
•
BusTurnAroundDuration = 0x0
STM32H7B0xB
Operating conditions
DS13196 - Rev 7
page 106/205



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