Electronic Components Datasheet Search
  British  ▼
ALLDATASHEET.CO.UK

X  

Preview PDF HTML

STM32H7B0IB Datasheet(PDF) 155 Page - STMicroelectronics

Part # STM32H7B0IB
Description  32-bit Arm® Cortex®-M7 280 MHz MCUs, 128-Kbyte Flash memory, 1.4-Mbyte RAM, 46 com. and analog interfaces, SMPS, crypto
PDF  205 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H7B0IB Datasheet(HTML) 155 Page - STMicroelectronics

Back Button STM32H7B0IB Datasheet HTML 151Page - STMicroelectronics STM32H7B0IB Datasheet HTML 152Page - STMicroelectronics STM32H7B0IB Datasheet HTML 153Page - STMicroelectronics STM32H7B0IB Datasheet HTML 154Page - STMicroelectronics STM32H7B0IB Datasheet HTML 155Page - STMicroelectronics STM32H7B0IB Datasheet HTML 156Page - STMicroelectronics STM32H7B0IB Datasheet HTML 157Page - STMicroelectronics STM32H7B0IB Datasheet HTML 158Page - STMicroelectronics STM32H7B0IB Datasheet HTML 159Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 155 / 205 page
background image
Symbol
Parameter
Conditions
Min(1)
Typ(1)
Max(1)(2)
Unit
tsu(SI)
Data input setup time
ns
Slave mode
2
-
-
th(MI)
Data input hold time
Master mode
3
-
-
th(SI)
Slave mode
1
-
-
ta(SO)
Data output access time
Slave mode
9
13
27
tdis(SO)
Data output disable time
Slave mode
0
1
5
tv(SO)
Data output valid time
Slave mode, 2.7 < VDD < 3.6 V
-
9/15(3)
11/16(3)
Slave mode, 1.62 < VDD < 3.6 V
-
9/15(3)
17/27(3)
tv(MO)
Master mode, 2.7 < VDD < 3.6 V
-
1/5(3)
1.5/7(3)
Master mode, 1.62 < VDD < 3.6 V
-
1/5(3)
2/13(3)
th(SO)
Data output hold time
Slave mode, 1.62 < VDD < 3.6 V
7
-
-
th(MO)
Master mode
0
-
-
1. Guaranteed by characterization results.
2. At VOS1, these values are degraded by up to 5 %.
3. Using PC3_C / PC2_C (not available on all packages).
Figure 59. SPI timing diagram - slave mode and CPHA = 0
MSv69584V1
SS input
CPHA=0
CPOL=0
CPHA=0
CPOL=1
MISO output
MOSI input
tsu(SI)
th(SI)
tw(SCKL)
tw(SCKH)
tc(SCK)
tr(SCK)
th(SS)
tdis(SO)
tsu(SS)
ta(SO)
tv(SO)
Next bits IN
Last bit OUT
First bit IN
First bit OUT
Next bits OUT
th(SO)
tf(SCK)
Last bit IN
STM32H7B0xB
Operating conditions
DS13196 - Rev 7
page 155/205



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com