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STPM066S Datasheet(PDF) 35 Page - STMicroelectronics |
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STPM066S Datasheet(HTML) 35 Page - STMicroelectronics |
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35 / 67 page ![]() 5.2.8 SPI REG Fault Table PWUP 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R R R R R R R R R R R R R R R R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Address 0x12 XX_POWERUP_FAULT: 1: means Power-on failed 0: means Power-on succeeded or regulator disabled by OTP REC_CNT: the counter of times that FSM into REC; will be cleared in STANDBY. If inf_retrail_en=1, REC_CNT is always 0. PLL_LOCK_STATUS: this bit is reporting the internal PLL locking status. When "1", the output frequency of the PLL is locked and stable. When "0", the PLL is not yet stable or off. WD_FAIL: watchdog fail flag, read and clear; Include normal WDI WD or SPI WD. 0: no fail 1: fail ABIST_ERR: ABist fail flag, read only. 0: no fail 1: fail SAF_CRC_FAILED: read only. 0: no fail 1: fail LBIST_ERR: read only. 0: no fail 1: fail 5.2.9 SPI REG ADC TH1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 RESERVED ADC_TH1 R R R R R R R R R R R R R R R R 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 Address 0x13 ADC_TH1: ADC bits output for TH1 cluster (VREG); read only STPM066S SPI registers mapping DS12976 - Rev 2 page 35/67 |
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