AT45DB641E datasheet(13/69 Pages) RENESAS

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AT45DB641E

DS-45DB641E-027N–DFLASH–2/2022

6.7

Page Erase

The Page Erase command can be used to individually erase any page in the main memory array allowing the Buffer to

Main Memory Page Program without Built-In Erase command or the Main Memory Byte/Page Program through Buffer 1

command to be utilized at a later time.

To perform a Page Erase with the standard DataFlash page size (264 bytes), an opcode of 81h must be clocked into the

device followed by three address bytes comprised of 15 page address bits (PA14 - PA0) that specify the page in the main

memory to be erased, and 9 dummy bits.

To perform a Page Erase with the binary page size (256 bytes), an opcode of 81h must be clocked into the device

followed by three address bytes comprised of 1 dummy bit, 15 page address bits (A22 - A8) that specify the page in the

main memory to be erased, and 8 dummy bits.

When a low-to-high transition occurs on the CS pin, the device will erase the selected page (the erased state is a

Logic 1). The erase operation is internally self-timed and should take place in a maximum time of t

PE. During this time, the

RDY/BUSY bit in the Status Register will indicate that the device is busy.

The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase properly. If

an erase error arises, it will be indicated by the EPE bit in the Status Register.

6.8

Block Erase

The Block Erase command can be used to erase a block of eight pages at one time. This command is useful when

needing to pre-erase larger amounts of memory and is more efficient than issuing eight separate Page Erase

commands.

To perform a Block Erase with the standard DataFlash page size (264 bytes), an opcode of 50h must be clocked into the

device followed by three address bytes comprised of 12 page address bits (PA14 - PA3), and

12 dummy bits. The 12 page address bits are used to specify which block of 8 pages is to be erased.

To perform a Block Erase with the binary page size (256 bytes), an opcode of 50h must be clocked into the device

followed by three address bytes comprised of 1 dummy bit, 12 page address bits (A22 - A11), and 11 dummy bits. The 12

page address bits are used to specify which block of 8 pages is to be erased.

When a low-to-high transition occurs on the CS pin, the device will erase the selected block of eight pages. The erase

operation is internally self-timed and should take place in a maximum time of t

BE. During this time, the RDY/BUSY bit in

the Status Register will indicate that the device is busy.

The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase properly. If

an erase error arises, it will be indicated by the EPE bit in the Status Register.

Table 6-1.

Block Erase Addressing

PA14

/A22

PA13

/A21

PA12

/A20

PA11/

A19

PA10

/A18

PA9/

A17

PA8/

A16

PA7/

A15

PA6/

A14

PA5/

A13

PA4/

A12

PA3/

A11

PA2/

A10

PA1/

PA0/

Block

•

4092

4093

4094

4095

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