74LVC2G74DP datasheet(2/20 Pages) PHILIPS

2 / 20 page

74LVC2G74_1

Product data sheet

Rev. 01 — 3 November 2005

2 of 20

Philips Semiconductors

74LVC2G74

Single D-type ﬂip-ﬂop with set and reset; positive edge trigger

Quick reference data

[1]

CPD is used to determine the dynamic power dissipation (PD in µW).

PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

Σ(C

L × VCC

× f

o) = sum of the outputs.

[2]

The condition is VI = GND to VCC.

Ordering information

Marking

Table 1:

Quick reference data

GND = 0 V; Tamb =25 °C; tr =tf ≤ 2.5 ns.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tPHL, tPLH propagation delay

CP to Q, QCL = 50 pF; VCC = 3.3 V

3.5

SD to Q, QCL = 50 pF; VCC = 3.3 V

3.0

RD to Q, QCL = 50 pF; VCC = 3.3 V

3.0

fmax

maximum input clock

frequency

CL = 50 pF; VCC = 3.3 V

280

MHz

input capacitance

4.0

CPD

power dissipation

capacitance

VCC = 3.3 V

[1] [2] -15

Table 2:

Ordering information

Type number

Package

Temperature range

Name

Description

Version

74LVC2G74DP

−40 °C to +125 °C

TSSOP8

plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

SOT505-2

74LVC2G74DC

−40 °C to +125 °C

VSSOP8

plastic very thin shrink small outline package;

8 leads; body width 2.3 mm

SOT765-1

74LVC2G74GT

−40 °C to +125 °C

XSON8

plastic extremely thin small outline package;

no leads; 8 terminals; body 1

× 1.95 × 0.5 mm

SOT833-1

Table 3:

Marking

Type number

Marking code

74LVC2G74DP

V74

74LVC2G74DC

V74

74LVC2G74GT

V74

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