REVISION 5 3/14/16

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©2016 INTEGRATED DEVICE TECHNOLOGY, INC.

MPC9446 DATA SHEET

Figure 6. CCLK0, 1 MPC9446 AC Test Reference for VCC = 3.3 V and VCC = 2.5 V

Figure 7. Output Transition Time Test Reference

Figure 8. Propagation Delay (tPD) Test Reference

Figure 9. Output-to-Output Skew tSK(LH, HL)

Figure 10. Output Pulse Skew (tSK(P)) Test Reference

Figure 11. Output Duty Cycle (DC)

Pulse

Generator

Z = 50



RT = 50

ZO = 50

RT = 50

ZO = 50 

MPC9446 DUT

VTT

VTT

VCC = 3.3V VCC = 2.5V

2.4

1.8V

0.55

0.6V

tF

tR

t(LH)

VCC

VCC2

GND

VCC

VCC2

GND

CCLK

Qx

t(HL)

The pin-to-pin skew is defined as the worst case difference

in propagation delay between any two similar delay paths

within a single device.

VCC

VCC2

GND

VCC

VCC2

GND

tSK(LH)

tSK(HL)

VCC

VCC2

GND

VCC

VCC2

GND

t(LH)

CCLK

QX

t(HL)

tSK(P) = | tPLH – tPHL |

The time from the PLL controlled edge to the non controlled

edge, divided by the time between PLL controlled edges,

expressed as a percentage.

VCC

VCC2

GND

tP

T0

DC = tP/T0 x 100%