AD7294 datasheet(13/45 Pages) AD

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Preliminary Technical Data

AD7294

Rev. PrB | Page 13 of 45

100...000

011...111

1LSB = 2

× V

REF/4096

+VREF – 1 LSB

–VREF + 1LSB VREF – 1LSB

ANALOG INPUT

100...001

100...010

011...110

000...001

000...000

111...111

Figure 11. Twos Complement Transfer Characteristic with VREF ± VREF Input Range

For Channels 1 to 4 in single-ended mode, the output code is

straight binary, where 000 = 0 V, FFF = VREF.

In differential mode, the code is twos complement, where

000 =0 V, 7FF = +VREF, 800 = −VREF, and FFF = 0 V − 1 LSB.

Channels 5 and 6 are twos complement, where 000 = 0 mV,

7FF = +200 mV, 800 = −200 mV, and FFF = 0 V − 1 LSB.

Channels 7 to 9 are twos complement with LSB = 0.25°C, where

000 = 0°C, 7FF = +255.75°C, 800 = −256°C, and FFF = −0.25°C.

ANALOG INPUTS

The AD7294 has a total of four analog inputs. Depending on

the configuration register setup, they can be configured as two

single-ended inputs, two pseudodifferential channels or two

fully differential channels. See the Register Setting section for

further details.

Single-Ended Mode

The AD7294 can have four single-ended analog input channels.

In applications where the signal source has high impedance, it is

recommended to buffer the analog input before applying it to

the ADC. The analog input range can be programmed to be

either 0 to VREF or 0 to 2 × VREF.In 2 × Vref mode, the input is

effectively divided by 2 before the conversion takes place, so the

input range becomes 0 to 2 × VREF. Note that the voltage on the

input channel pins with respect to GND cannot exceed VDD.

If the analog input signal to be sampled is bipolar, the internal

reference of the ADC can be used to externally bias up this

signal so that it is correctly formatted for the ADC. Figure 12

shows a typical connection diagram when operating the ADC

in single-ended mode.

VIN

+1.25V

–1.25V

DCAPA/DCAPB

VA1

AD7294

VB6

+2.5V

0.47

µF

1ADDITIONAL PINS OMITTED FOR CLARITY.

Figure 12. Single-Ended Mode Connection Diagram

Differential Mode

The AD7294 can have two differential analog input pairs.

Differential signals have some benefits over single-ended

signals, including noise immunity based on the device’s

common-mode rejection and improvements in distortion

performance. Figure 13 defines the fully differential analog

input of the AD7294.

VIN+

AD7294

VIN–

VREF p-p

COMMON

MODE

VOLTAGE

1ADDITIONAL PINS OMITTED FOR CLARITY.

Figure 13. Differential Input Definition

The amplitude of the differential signal is the difference

between the signals applied to the VIN+ and VIN− pins in each

differential pair (VIN+ − VIN−). For the various differential

modes, refer to the ADC Channel Allocation section. The

resulting converted data is stored in 2s complement format in

the Result Register. VIN+ and VIN− should be driven

simultaneously by two signals each of amplitude VREF (or 2 ×

VREF, depending on the range chosen) that are 180° out of phase.

Assuming the 0 to VREF range is selected, the amplitude of the

differential signal is therefore −VREF to +VREF peak-to-peak (2 ×

VREF), regardless of the common mode (CM).

The common mode is the average of the two signals

(VIN+ + VIN−)/2

And is therefore the voltage on which the two inputs are

centered.

This results in the span of each input being CM ± VREF/2. This

voltage has to be set up externally, and its range varies with the

reference value, VREF. As the value of VREF increases, the common-

mode range decreases. When driving the inputs with an amplifier,

the actual common-mode range is determined by the amplifier’s

output voltage swing.

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