FXPS7115D4 datasheet(6/72 Pages) NXP

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NXP Semiconductors

FXPS7115D4

Digital absolute pressure sensor, 40 kPa to 115 kPa

7.3.1.1 PABS common mode verification

When the PABS common mode self-test is selected, the ST_ACTIVE bit is set, the ST_ERROR is cleared, and

the device begins an internal measurement of the common mode signal of the P-cells and compares the result

against a predetermined limit. If the result exceeds the limit, the ST_ERROR bit is set. The PABS common mode

self-test repeats continuously every tST_INIT when the ST_CTRL bits are set to the specified value. Once the

test is disabled, the ST_ERROR bit updates with the final test result within tST_INIT of disabling the test. The

ST_ACTIVE bit remains set until the final test result is reported. Figure 4 is an example of a user-controlled self-

test procedure.

aaa-023443

Read the DSP_STAT Register

Delay 500 s

Delay > tST_INIT from Self Test

Activation

Write ST_CTRL = 0x0

Disable PABS

Common Mode Self Test

Write ST_CTRL = 0x10

Enable PABS

Common Mode Self Test

ST_ACTIVE Set?

yes

User Determined Options:

Repeat Self-Test xx times

Set error status and continue

Set error status and ignore sensor data

ST_ERROR Set?

END

yes

Figure 4. User-controlled PABS common mode self-test flowchart

7.3.1.2 Startup digital self-test verification

Four unique fixed values can be forced at the output of the sinc filter by writing to the ST_CTRL bits as shown in

Table 4. The digital self-test values result in a constant value at the output of the signal chain. After a specified

time period, the SNS_DATAx register value can be verified against the specified values in the table below. The

values listed below are for the PABS signal. When any of these self-test functions are selected, the ST_ACTIVE

bit is set. These signals can only be selected when the ENDINIT bit is not set.

FXPS7115D4

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6.1 — 7 June 2023

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