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AN2533 Datasheet(PDF) 4 Page - Motorola, Inc |
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AN2533 Datasheet(HTML) 4 Page - Motorola, Inc |
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4 / 24 page ![]() AN2533/D 4 Standard SVM – 3 outputs version – XOR version TPU Function Set (svmStd3Xor) MOTOROLA 3. Initializes function parameters. The parameters T, prescaler, SQRT3, CPU14 and sync_presc_addr must be set before initialization. If an svmStd3Xor_sync channel or an svmStd3Xor_res channel is used, then its parameters must also be set before initialization. 4. Issues an HSR (Host Service Request) type %10 to one of the svmStd3Xor_R channels to initialize all svmStd3Xor_R and svmStd3Xor_T channels. Issues an HSR type %10 to the svmStd3Xor_sync channels, svmStd3Xor_res channels and svmStd3Xor_fault channel, if used. 5. Enables servicing by assigning high, middle or low priority to the channel priority bits. All svmStd3Xor_R and svmStd3Xor_T channels must be assigned the same priority to ensure correct operation. The CPU must ensure that the svmStd3Xor_sync or svmStd3Xor_res channels are initialized after the initialization of the svmStd3Xor_R and svmStd3Xor_T channels: – assign a priority to the svmStd3Xor_R and svmStd3Xor_T channels to enable their initialization – if a Synchronization Signal or a Resolver Reference Signal channel is used, wait until the HSR bits are cleared to indicate that initialization of the svmStd3Xor_R and svmStd3Xor_T channels has completed and – assign a priority to the svmStd3Xor_sync or svmStd3Xor_res channels to enable their initialization NOTE: A CPU routine that configures the TPU can be generated automatically using the MPC500_Quick_Start Graphical Configuration Tool. Detailed Function Description Standard Space Vector Modulation – 3 outputs version – XOR version – R channels (svmStd3Xor_R) and Standard Space Vector Modulation – 3 outputs version – XOR version – T channels (svmStd3Xor_T) The svmStd3Xor_R and svmStd3Xor_T TPU functions work together to generate 3 pairs of XOR gate inputs. The XOR gate outputs then produce a 3- channel 3-phase center-aligned PWM signal. Unlike the svmStd, the generated signals are not top-bottom pairs with dead-times but only top-like signals without dead-times. In order to charge the bootstrap transistors, the PWM signals start to run 1.6ms after their initialization (at 20MHz TCR1 clock). The functions generate signals corresponding to Reference Voltage Vector Amplitude of 0 (50% duty-cycle) until the first reloaded values are processed. The CPU controls the PWM output by setting the TPU parameters. The Stator Reference Voltage Vector components uá and uâ have to be adjusted during run time. The PWM period T and the prescaler – the number of PWM periods per reload of new values – are also read at each reload, so these parameters can be changed during run time. The CPU notifies the TPU that the new reload Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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