Nexperia

74LVC2G74

Single D-type flip-flop with set and reset; positive edge trigger

11.1. Waveforms and test circuit

mnb141

th

tsu

th

tPHL

tPHL

tPLH

tPLH

tsu

1/fmax

tW

VM

VM

VM

VI

GND

VM

VI

GND

CP input

D input

VOH

VOL

Q output

VOH

VOL

Q output

Measurement points are given in Table 10.

The shaded areas indicate when the input is permitted to change for predictable output performance.

VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 6. The clock input (CP) to output (Q, Q) propagation delays, the clock pulse width, the D to CP set-up time,

the CP to D hold time and the CP maximum frequency

74LVC2G74

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Product data sheet

Rev. 14 — 27 August 2021

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