AD9927BBCZ datasheet(75/100 Pages) AD

75 / 100 page

AD9927

Rev. 0 | Page 75 of 100

CLI

XX XX

3ns MIN

XXX

XX X

3ns MIN

tCLIDLY

35.5 CYCLES

X X X

NOTES

1. EXTERNAL HD FALLING EDGE IS LATCHED BY CLI RISING EDGE, AND THEN LATCHED AGAIN BY SHD INTERNAL FALLING EDGE.

2. INTERNAL H-COUNTER IS ALWAYS RESET 35.5 CLOCK CYCLES AFTER THE INTERNAL HD FALLING EDGE.

3. DEPENDING ON THE VALUE OF SHDLOC, H-COUNTER RESET CAN OCCUR 36 OR 37 CLI CLOCK EDGES AFTER THE EXTERNAL HD FALLING EDGE.

4. SHDLOC = 0 IS SHOWN IN ABOVE EXAMPLE. IN THIS CASE, THE H-COUNTER RESET OCCURS 36 CLI RISING EDGES AFTER HD FALLING EDGE.

5. HD FALLING EDGE SHOULD OCCUR COINCIDENT WITH VD FALLING EDGE (WITHIN SAME CLI CYCLE) OR AFTER VD FALLING EDGE. HD FALLING

EDGE SHOULD NOT OCCUR WITHIN FIVE CLI CYCLES PRIOR TO THE VD FALLING EDGE.

H-COUNTER

RESET

SHD

INTERNAL

H-COUNTER

(PIXEL COUNTER)

tVDHD

Figure 89. External VD/HD and Internal H-Counter Synchronization, Slave Mode

1HBLKTOG1

(60 – 36) = 24

2HBLKTOG2

100

(100 – 36) = 64

3CLPOB_TOG1

103

(103 – 36) = 67

4CLPOB_TOG2

112

(112 – 36) = 76

MASTER MODE

SLAVE MODE

CLPOB

PIXEL NO.

112

103

100

Figure 90. Example of Slave Mode Register Setting to Obtain Desired Toggle Positions

Vertical Toggle Position Placement Near Counter Reset

An additional consideration during the reset of the internal

counters is the vertical toggle position placement. Prior to the

internal counters being reset, there is a region of 36 pixels

during which no toggle positions should be programmed.

As shown in Figure 91, for master mode the last 36 pixels before

the HD falling edge must not be used for toggle position placement

of the V, VSG, SUBCK, HBLK, PBLK, or CLPOB pulses.

Figure 92 shows the same example for slave mode. The same

restriction applies: the last 36 pixels before the counters are

reset cannot be used. However, in slave mode, the counter reset

is delayed with respect to VD/HD placement, so the inhibited

area is different than it is in master mode.

It is recommended that Pixel Location 0 not be used for any of

the toggle positions for the VSG and SUBCK pulses.

AD9927BBCZ Datasheet(PDF) 75 Page - Analog Devices

AD9927BBCZ Datasheet(HTML) 75 Page - Analog Devices

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