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BUJ100AT Datasheet(PDF) 3 Page - NXP Semiconductors

Part # BUJ100AT
Description  Silicon Diffused Power Transistor
PDF  9 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

BUJ100AT Datasheet(HTML) 3 Page - NXP Semiconductors

  BUJ100AT Datasheet HTML 1Page - NXP Semiconductors BUJ100AT Datasheet HTML 2Page - NXP Semiconductors BUJ100AT Datasheet HTML 3Page - NXP Semiconductors BUJ100AT Datasheet HTML 4Page - NXP Semiconductors BUJ100AT Datasheet HTML 5Page - NXP Semiconductors BUJ100AT Datasheet HTML 6Page - NXP Semiconductors BUJ100AT Datasheet HTML 7Page - NXP Semiconductors BUJ100AT Datasheet HTML 8Page - NXP Semiconductors BUJ100AT Datasheet HTML 9Page - NXP Semiconductors  
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Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ100AT
Fig.1. Test circuit for V
CEOsust.
Fig.2. Oscilloscope display for V
CEOsust.
Fig.3. Normalised power dissipation.
PD% = 100
⋅PD/PD
25˚C = f (Tmb)
!
Fig.4. Transient thermal impedance.
Zth
j-lead = f(t); parameter D = tp/T
Fig.5. Typical DC current gain. h
FE = f(IC)
parameter V
CE
Fig.6. Typical DC current gain. h
FE = f(IC)
parameter V
CE
+ 50v
100-200R
Horizontal
Vertical
Oscilloscope
1R
6V
30-60 Hz
300R
1u
100u
10m
1
100
t / s
Zth / (K/W)
100
10
1
0.1
0.01
D=0
0.5
0.2
0.1
0.05
0.02
10u
1m
100m
10
D =
tp
T
T
P
t
D
tp
VCE / V
min
VCEOsust
IC / mA
10
100
250
0
0.001
0.01
0.1
1
2
3
5
1
5
10
15
20
30
IC/A
HFE
VCE = 1V
25 C
-40 C
125 C
0
20
40
60
80
100
120
140
Tmb / C
PD%
Normalised Power Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
0.001
0.01
0.1
1
2
3
5
1
10
30
IC/A
HFE
VCE = 5V
25 C
-40 C
125 C
September 1999
3
Rev 1.000



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