M41T82 datasheet(44/58 Pages) STMICROELECTRONICS

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Clock operation

M41T82 M41T83

44/58

3.15

Initial power-on defaults

Upon initial application of power to the device, the register bits will initially power-on in the state indicated

in Table 15 and Table 16.

3.16

OTP bit operation (M41T83 only)

When the OTP (One Time Programmable) bit is set to a '1,' the value in the internal OTP registers will be

transferred to the analog calibration register (12h) and are “Read only.” The OTP value is programmed

by the manufacturer, and will contain the calibration value necessary to achieve ±5 ppm at room

temperature.

If the OTP bit is set to '0,' the analog calibration register will become a WRITE/READ register and

function like standard SRAM memory cells, allowing the user to implement any desired value of analog

calibration.

When the user sets the OTP bit, they need to wait for approximately 3 to 4ms before the analog registers

transfer the value from the OTP to the analog registers due to the OTP Read operation.

Table 15.

Initial power-on default values (part 1)

Condition(1)

All other control bits power-up in an undetermined state.

CB1 CB0 OUT

DCS

ACS

Digital

calib.

Analog

calib.

OFIE

(2)

M41T83 only.

Watchdog

(3)

BMB0-BMB4, RB0, RB1.

A1IE

(2)

SQWE

(2)

ABE

Initial

Power-up

Subsequent

Power-up(4) (5)

With battery back-up.

UC = Unchanged.

Table 16.

Initial power-up default values (part 2)

Condition(1)

All other control bits power-up in an undetermined state.

RPT11-15

TI/TP

(2)

M41T83 only.

TIE

(2)

TD1 TD0 RS0 RS1-3

OTP

(2)

A2IE

(2)

RPT21-

AL2E

Initial

Power-up

Subsequent

Power-up(3) (4)

With battery back-up.

UC = Unchanged.

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