ST7FL15F1MATRE datasheet(5/138 Pages) STMICROELECTRONICS

5 / 138 page

ST7L15, ST7L19

5/138

2 PIN DESCRIPTION

Figure 2. 20-Pin SO Package Pinout

Notes:

1. This pin cannot be configured as external interrupt in ROM devices.

2. OSC1 and OSC2 are not multiplexed in ROM devices and Port C is not present.

Legend / Abbreviations for Table 1:

Type:

I = input, O = output, S = supply

In/Output level: CT = CMOS 0.3VDD /0.7VDD with input trigger

Output level:

HS = 20mA high sink (on N-buffer only)

Port and control configuration:

– Input:

float = floating, wpu = weak pull-up, int = interrupt, ana = analog

– Output:

OD = open drain, PP = push-pull

The RESET configuration of each pin (shown in bold) is valid as long as the device is in reset state.

Table 1. Device Pin Description

VSS

VDD

AIN5/PB5

CLKIN/AIN4/PB4

MOSI/AIN3/PB3

MISO/AIN2/PB2

SCK/AIN1/PB1

SS/AIN0/PB0

OSC1/CLKIN/PC02)

OSC2/PC12)

PA5 (HS)/ATPWM3/ICCDATA

PA4 (HS)/ATPWM2

PA3 (HS)/ATPWM1

PA2 (HS)/ATPWM0

PA1 (HS)/ATIC

PA0 (HS)/LTIC1)

(HS) 20mA High sink capability

eix

associated external interrupt vector

AIN6/PB6

PA7 (HS)

PA6/MCO/ICCCLK/BREAK

RESET

ei3

ei2

ei0

ei1

Pin No.

Pin Name

Level

Port / Control

Main

Function

(after

reset)

Alternate Function

SO20

Input

Output

1VSS

Ground

2VDD

Main power supply

RESET

I/O CT

Top priority non maskable interrupt (active low)

ST7FL15F1MATRE Datasheet(PDF) 5 Page - STMicroelectronics

ST7FL15F1MATRE Datasheet(HTML) 5 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL