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RT6318B Datasheet(PDF) 20 Page - Richtek Technology Corporation

Part # RT6318B
Description  8A, 23V Synchronous Step-Down Converter with 3.3V/5V LDO
PDF  25 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT6318B Datasheet(HTML) 20 Page - Richtek Technology Corporation

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RT6318B/C
20
DS6318B/C-01 December 2021
www.richtek.com
©
Copyright 2021 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
Figure 7. Derating Curve of Maximum Power Dissipation
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
25
50
75
100
125
Ambient Temperature (°C)
Four-Layer PCB
Layout Considerations
Printed circuit board (PCB) layout design for switch-mode
power supply IC is critical and important. Improper PCB
layout brings lots of misbehaviors on power supply, such
as poor output voltage regulation, switching jitter, bad
thermal performance, excessively radiate noise and
alleviating component reliability. For avoiding those issues,
designers have to understand current trace and signal flow
in the switching power supply. The following design
concepts present design consideration of PCB layout for
switching power supply.
For suppressing phase ring and extra power losses that
affect device reliability, the input capacitor has to place
close to VIN pin to reduce the influence of parasitic
inductor.
For thermal stress and power consumption
considerations, the current paths of VIN and VOUT are
as short and wide as possible to decrease the trace
impedance.
Since the LX node voltage swings from VIN to GND with
very fast rising and falling times, switching power supply
suffers quite serious EMI issues. To eliminate EMI
problems, the inductor must put as close as possible
to IC to narrow the LX node area. Besides, the LX node
should arrange in the same plate to reduce coupling
noise path caused by parasitic capacitance.
Thermal Considerations
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding airflow,
and the difference between the junction and ambient
temperatures. The maximum power dissipation can be
calculated using the following formula :
PD(MAX) = (TJ(MAX)
− TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and
θJA is the junction-to-ambient
thermal resistance.
For continuous operation, the maximum operating junction
temperature indicated under Recommended Operating
Conditions is 125
°C. The junction-to-ambient thermal
resistance,
θJA, is highly package dependent. For a UQFN-
12HL 3x3 package, the thermal resistance,
θJA, 35.8°C/
W is measured in the natural convection at TA = 25
°C on
a four-layer Richtek evaluation board. The maximum power
dissipation at TA = 25
°C can be calculated as below :
PD(MAX) = (125
°C − 25°C) / (35.8°C/W) = 2.79W for a
UQFN-12HL 3x3 package.
The maximum power dissipation depends on the operating
ambient temperature for the fixed TJ(MAX) and the thermal
resistance,
θJA. The derating curves in Figure 7 allows
the designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Table 2. Dividing Resistors of RT6318B/C
RT6318B
RT6318C
R1
90k
150k
R2
20k
 



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