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TSS461C Datasheet(PDF) 5 Page - ATMEL Corporation |
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TSS461C Datasheet(HTML) 5 Page - ATMEL Corporation |
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5 / 57 page ![]() 5 TSS461C 4193G–AUTO–12/04 Operation The TSS461C is a microprocessor-controlled line controller for the VAN bus. It can inter- face to virtually any microprocessor, but the I/O signals of the circuit have been optimized to use with the TSC51/TSC251 series of microcontrollers. It features a multiplexed address and data bus, controlled by an address strobe pin ALE and separated read RD and write WR command pins. The address is latched on the fall- ing edge of ALE. The circuit also features one single interrupt pin. This pin can be treated as level or edge sensitive, For example, if there is a pending interrupt inside the circuit when another interrupt is reset, the INT pin will emit a high pulse with the same pulse width as the internal write strobe (typically 20 ns). Figure 1. Typical Application Remaining Pins TSS461C Microcontroller Series P3.6/WR P3.7/RD ALE P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 WR RD ALE AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 XTAL1 XTAL2 TXD RXD0 RXD1 RXD2 CS VAN DLC INT CKOUT RESET RESET XTAL1 INT V CC 33 pF C1 GND GND + - + - + - V REF DATA DATA Differential VAN Bus VAN Line Driver & Receivers General I/O |
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