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PCF85063AT Datasheet(PDF) 24 Page - NXP Semiconductors |
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PCF85063AT Datasheet(HTML) 24 Page - NXP Semiconductors |
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24 / 55 page  NXP Semiconductors PCF85063A Tiny Real-Time Clock/calendar with alarm function and I2C-bus Bit Symbol Value Place value Description 4 0[1] to 1 ten’s place 3 to 0 HOUR_ALARM 0[1] to 9 unit place hour alarm information in 12-hour mode coded in BCD format 24-hour mode[2] 5 to 4 0[1] to 2 ten’s place 3 to 0 HOUR_ALARM 0[1] to 9 unit place hour alarm information in 24-hour mode coded in BCD format Table 30. Hour_alarm - hour alarm register (address 0Dh) bit description...continued [1] Default value. [2] Hour mode is set by the 12_24 bit in register Control_1. 7.5.4 Register Day_alarm Bit Symbol Value Place value Description day alarm 0 - enabled 7 AEN_D 1[1] - disabled 6 - 0 - unused 5 to 4 0[1] to 3 ten’s place 3 to 0 DAY_ALARM 0[1] to 9 unit place day alarm information coded in BCD format Table 31. Day_alarm - day alarm register (address 0Eh) bit description [1] Default value. 7.5.5 Register Weekday_alarm Bit Symbol Value Description weekday alarm 0 enabled 7 AEN_W 1[1] disabled 6 to 3 - 0 unused 2 to 0 WEEKDAY_ALARM 0[1] to 6 weekday alarm information coded in BCD format Table 32. Weekday_alarm - weekday alarm register (address 0Fh) bit description [1] Default value. 7.5.6 Alarm function By clearing the alarm enable bit (AEN_x) of one or more of the alarm registers, the corresponding alarm condition(s) are active. When an alarm occurs, AF is set logic 1. The asserted AF can be used to generate an interrupt (INT). The AF is cleared by command. The registers at addresses 0Bh through 0Fh contain alarm information. When one or more of these registers is loaded with second, minute, hour, day or weekday, and its corresponding AEN_x is logic 0, then that information is compared with the current second, minute, hour, day, and weekday. When all enabled comparisons first match, the alarm flag (AF in register Control_2) is set logic 1. PCF85063A All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 7.1 — 8 November 2023 24 / 55 |
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