ADA4937-1YCPZ-R7 datasheet(19/28 Pages) AD

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ADA4937-1

Rev. 0 | Page 19 of 28

)

Similar to the case of a conventional op amp, the output noise

voltage densities can be estimated by multiplying the input-

referred terms at +IN and −IN by the appropriate output factor,

where:

(

is the circuit noise gain.

and

are the feedback factors.

When RF1/RG1 = RF2/RG2, then β1 = β2 = β, and the noise gain

becomes

Note that the output noise from VOCM goes to zero in this case.

The total differential output noise density, vnOD, is the root-sum-

square of the individual output noise terms.

∑

nOi

nOD

THE IMPACT OF MISMATCHES IN THE FEEDBACK

NETWORKS

As previously mentioned, even if the external feedback networks

(RF/RG) are mismatched, the internal common-mode feedback

loop still forces the outputs to remain balanced. The amplitudes

of the signals at each output remain equal and 180° out of phase.

The input-to-output, differential mode gain varies proportionately

to the feedback mismatch, but the output balance is unaffected.

As well as causing a noise contribution from VOCM, ratio

matching errors in the external resistors result in a degradation

of the ability of the circuit to reject input common-mode signals,

much the same as for a four-resistor difference amplifier made

from a conventional op amp.

In addition, if the dc levels of the input and output common-

mode voltages are different, matching errors result in a small

differential-mode output offset voltage. When G = 1, with a

ground referenced input signal and the output common-mode

level set to 2.5 V, an output offset of as much as 25 mV (1% of

the difference in common-mode levels) can result if 1% tolerance

resistors are used. Resistors of 1% tolerance result in a worst-

case input CMRR of about 40 dB, a worst-case differential-

mode output offset of 25 mV due to 2.5 V level-shift, and no

significant degradation in output balance error.

CALCULATING THE INPUT IMPEDANCE OF AN

APPLICATION CIRCUIT

The effective input impedance of a circuit depends on whether

the amplifier is being driven by a single-ended or differential

signal source. For balanced differential input signals, as shown

in Figure 48, the input impedance (RIN, dm) between the inputs

(+DIN and −DIN) is simply RIN, dm = 2 × RG.

+VS

ADA4937-1

+IN

–IN

+DIN

–DIN

VOCM

VOUT, dm

Figure 48. ADA4937-1 Configured for Balanced (Differential) Inputs

For an unbalanced, single-ended input signal (see Figure 49),

the input impedance is

() ⎟

⎟

⎠

⎞

⎜

⎝

⎛

−

ADA4937-1

+VS

VOCM

VOUT, dm

Figure 49. ADA4937-1 Configured for Unbalanced (Single-Ended) Input

The input impedance of the circuit is effectively higher than it

would be for a conventional op amp connected as an inverter

because a fraction of the differential output voltage appears at

the inputs as a common-mode signal, partially bootstrapping

the voltage across the input resistor RG.

INPUT COMMON-MODE VOLTAGE RANGE IN

SINGLE-SUPPLY APPLICATIONS

The ADA4937-1 is optimized for level-shifting, ground-referenced

input signals. As such, the center of the input common-mode

range is shifted approximately 1 V down from midsupply. For

5 V single-supply operation, the input common-mode range at

the summing nodes of the amplifier is 0.3 V to 3.0 V, and 0.3 V

to 1.9 V with a 3.3 V supply. To avoid clipping at the outputs,

the voltage swing at the +IN and –IN terminals must be confined

to these ranges.

SETTING THE OUTPUT COMMON-MODE VOLTAGE

The VOCM pin of the ADA4937-1 is internally biased at a voltage

approximately equal to the midsupply point (average value of

the voltages on V+ and V−). Relying on this internal bias results

in an output common-mode voltage that is within about 100 mV of

the expected value.

In cases where more accurate control of the output common-

mode level is required, it is recommended that an external

source, or resistor divider (10 kΩ or greater resistors), be used.

The output common-mode offset listed in the Specifications

section assumes that the VOCM input is driven by a low impedance

voltage source.

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