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VM6101 Datasheet(PDF) 11 Page - STMicroelectronics |
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VM6101 Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 17 page ![]() VM6101 Register description 11/17 0x21 [3:0] 0x00 PWM_FREQ PWM output frequency (RW)(4 MSBs are reserved): n = 0 to 15 fPWM = fOSC * 2 n-18, where f OSC = 3.6 MHz. 0x22 [4:0] 0x00 PWM_SENS PWM sensitivity (RW)(3 MSBs are reserved): n = 0 to 26 0 = high sensitivity, 26 = low sensitivity. Practical values lie between 9 and 18. Refer to Figure 4: PWM duty cycle versus illumination for typical behavior. 0x22 ... 0x27 [7:0] Reserved. 0x28 [7:0] 0x04 TEST_MOD Reserved (RW). 0x29 [7:0] 0x00 TEST_SEL Reserved (RW). 0x2A ... 0xFF [7:0] Reserved. Table 3. Register description (continued) Addr. Bits Def. Name Description |
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