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PLS153 Datasheet(PDF) 7 Page - NXP Semiconductors |
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PLS153 Datasheet(HTML) 7 Page - NXP Semiconductors |
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7 / 9 page ![]() Philips Semiconductors Programmable Logic Devices Product specification PLS153/A Programmable logic arrays (18 × 42 × 10) October 22, 1993 7 OR ARRAY – (B) CODE INACTIVE A CODE Pn STATUS ACTIVE1 • P S Pn STATUS P S SP00282 NOTES: 1. This is the initial unprogrammed state of all links. 2. Any gate Pn will be unconditionally inhibited if both the True and Complement of an input (either I or B) are left intact. VIRGIN STATE A factory shipped virgin device contains all fusible links intact, such that: 1. All outputs are at “H” polarity. 2. All Pn terms are disabled. 3. All Pn terms are active on all outputs. CAUTION: PLS153A TEST COLUMNS The PLS153A incorporates two columns not shown in the logic block diagram. These columns are used for in-house testing of the device in the unprogrammed state. These columns must be disabled prior to using the PLS153A in your application. If you are using a Philips Semiconductors-approved programmer, the disabling is accomplished during the device programming sequence. If these columns are not disabled, abnormal operation is possible. Furthermore, because of these test columns, the PLS153A cannot be programmed using the programmer algorithm for the PLS153. |
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