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XRT83SL38IB Datasheet(PDF) 21 Page - Exar Corporation |
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XRT83SL38IB Datasheet(HTML) 21 Page - Exar Corporation |
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21 / 88 page ![]() XRT83SL38 19 REV. 1.0.2 OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR EQC4 EQC3 EQC2 EQC1 EQC0 RDY_DTACK CS ALE_AS RD_DS WR_R/W A6 B7 A7 C7 D7 A6 B7 A7 C7 D7 I O I I I I Equalizer Control Input 4 - Hardware mode This pin together with pins EQC[3:0] is used to control the transmit pulse shaping, transmit line build-out (LBO) and receive monitoring while operating at one of either the T1, E1 or J1 clock rates/modes. SEE”RECEIVE EQUALIZER CONTROL AND TRANSMIT LINE BUILD-OUT SETTINGS” ON PAGE 30. for description of Transmit Equalizer Control bits. Equalizer Control Input 3 Equalizer Control Input 2 Equalizer Control Input 1 Equalizer Control Input 0 NOTES: 1. In Hardware mode all transmit channels share the same pulse setting controls function. 2. All channels of an XRT83L38 must operate at the same clock rate, either the T1, E1 or J1 modes. In Host mode, these pins perform various microprocessor functions. SEE”MICRO- PROCESSOR INTERFACE” ON PAGE 12. NOTE: Internally pulled “Low” with a 50k Ω resistor. RXTSEL U11 I Receiver Termination Select In Hardware mode, when this pin is “Low” the receive line termination is determined only by an external resistor. When “High”, the receive termination is realized by the internal resistor or the combination of internal and external resistors. These conditions are described in the table below. NOTE: In Hardware mode all channels share the same RXTSEL control function. In Host mode, the RXTSEL_n bits in the channel control registers determine if the receiver termination is external or internal. However, the function of RXTSEL can be transferred to the Hardware pin by setting the TERCNTL bit (bit 6) to “1” in the register address hex 0x82. NOTE: This pin is internally pulled “Low” with a 50k Ω resistor. TXTSEL V11 I Transmit Termination Select - Hardware Mode When this pin is “Low” the transmit line termination is determined only by an external resistor. When “High”, the transmit termination is realized only by the internal resistor. NOTES: 1. This pin is internally pulled “Low” with a 50k Ω resistor. 2. In Hardware mode all channels share the same TXTSEL control function. SIGNAL NAME LEAD #TYPE DESCRIPTION RXTSEL RX Termination 0 1 External Internal TXTSEL TX Termination 0 1 External Internal |
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