24LC41A-SLASHP datasheet(5/18 Pages) MICROCHIP

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 2003 Microchip Technology Inc.

DS21176D-page 5

24LC41A

2.1.3

BIDIRECTIONAL MODE

Before the 24LC41A can be switched into the Bidirec-

tional mode (Figure 2-4), it must enter the transition

mode, which is done by applying a valid high-to-low

transition on the Bidirectional mode Clock (DSCL). As

soon it enters the transition mode, it looks for a control

byte 1010 000X on the I2C™ bus, and starts to count

pulses on VCLK. Any high-to-low transition on the

DSCL line will reset the count. If it sees a pulse count

of 128 on VCLK while the DSCL line is idle, it will revert

back to the Transmit-only mode, and transmit its

contents starting with the Most Significant bit in

address 00h. However, if it detects the control byte on

the I2C bus, (Figure 2-3) it will switch to the in the

Bidirectional mode. Once the device has made the

transition to the Bidirectional mode, the only way to

switch the device back to the Transmit-only mode is to

remove power from the device. The mode transition

process is shown in detail in Figure 2-4.

Once the device has switched into the Bidirectional

mode, the VCLK input is disregarded, with the excep-

tion that a logic high level is required to enable write

capability. This mode supports a two-wire bidirectional

data transmission protocol (I2C

). In this protocol, a

device that sends data on the bus is defined to be the

transmitter, and a device that receives data from the

bus is defined to be the receiver. The bus must be

controlled by a master device that generates the

Bidirectional mode Clock (DSCL), controls access to

the bus and generates the Start and Stop conditions,

while the monitor port acts as the slave. Both master

and slave can operate as transmitter or receiver, but

the master device determines which mode is activated.

In the Bidirectional mode, the monitor port only

responds to commands for device 1010 000X.

2.2

Microcontroller Access Port

The Microcontroller Access Port supports a bidirec-

tional 2-wire bus and data transmission protocol. A

device that sends data onto the bus is defined as

transmitter, and a device receiving data as receiver.

The bus has to be controlled by a master device which

generates the serial clock (MSCL), controls the bus

access, and generates the Start and Stop conditions,

while the Microcontroller Access Port works as slave.

Both master and slave can operate as transmitter or

receiver, but the master device determines which mode

is activated.

FIGURE 2-3:

SUCCESSFUL MODE TRANSITION TO BIDIRECTIONAL MODE

FIGURE 2-4:

MODE TRANSITION WITH RECOVERY TO TRANSMIT-ONLY MODE

Transition mode with possibility to return to Transmit-only mode

Bidirectional

permanently

SCL

SDA

VCLK count =

VCLK

Transmit-only

mode

MODE

ACK

n < 128

TVHZ

SCL

SDA

VCLK

Transmit-only

MODE

Bidirectional

Recovery to Transmit-only mode

Bit8

(MSB of data in 00h)

VCLK count =

127 128

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