| Electronic Components Datasheet Search |
|
VD66GY Datasheet(PDF) 29 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
VD66GY Datasheet(HTML) 29 Page - STMicroelectronics |
|
29 / 37 page ![]() 8.4 CLKIN input Table 13. Typical CLKIN input The CLKIN input is for all voltage and temperature conditions. Symbol Parameter Min. Max. Unit VCLKINL DC-coupled square wave low-level input -0.3 0.3 x VDDIO V VCLKINH DC-coupled square wave high-level input 0.7 x VDDIO VDDIO + 0.3 fCLKIN Clock input frequency 6 27 MHz CtoCjitter Clock maximum cycle-to-cycle jitter — 200 ps Duty cycle Clock duty cycle 40 60 % ICLKIN Input leakage current — 10 µA 8.5 Digital inputs Table 14. Digital inputs over process variations at 60°C Symbol Parameter Min. Max. Unit VIL Low-level input voltage -0.3 0.3 x VDDIO V VIH High-level input voltage 0.7 x VDDIO VDDIO + 0.3 ILeak Input leakage current (1) — 10 μA 1. For 0 ≤ VI ≤ VDDIO 8.6 Digital outputs Table 15. Digital outputs The digital outputs are over process variations at 60°C. Symbol Parameter Conditions Min. Max. Unit VOL Low-level output voltage IOL = -4 mA — 0.4 V VOH High-level output voltage IOH = 4 mA VDDIO - 0.4V — Imax Maximum current — — 4 mA VD66GY Electrical characteristics DS13838 - Rev 7 page 29/37 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |