ADA4937-2YCPZ-R2 datasheet(19/28 Pages) AD

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Data Sheet

ADA4937-1/ADA4937-2

Rev. F | Page 19 of 28

Similar to the case of a conventional operational amplifier, the

output noise voltage densities can be estimated by multiplying

the input-referred terms at +IN and −IN by the appropriate output

factor, where:







is the circuit noise gain.





and





are the feedback factors.

When RF1/RG1 = RF2/RG2, then β1 = β2 = β, and the noise gain

becomes





Note that the output noise from VOCM goes to zero in this case.

The total differential output noise density, vnOD, is the root-sum-

square of the individual output noise terms.





nOi

nOD

IMPACT OF MISMATCHES IN THE FEEDBACK

NETWORKS

As previously mentioned in the Setting the Closed-Loop Gain

section), even if the external feedback networks (RF/RG) are

mismatched, the internal common-mode feedback loop still

forces the outputs to remain balanced. The amplitudes of the

signals at each output remain equal and 180° out of phase. The

input-to-output differential mode gain varies proportionately to

the feedback mismatch, but the output balance is unaffected.

As well as causing a noise contribution from VOCM, ratio matching

errors in the external resistors result in a degradation of the

ability of the circuit to reject input common-mode signals, much

the same as for a four-resistor difference amplifier made from a

conventional operational amplifier.

In addition, if the dc levels of the input and output common-

mode voltages are different, matching errors result in a small

differential-mode output offset voltage. When G = 1, with a

ground referenced input signal and the output common-mode

level set to 2.5 V, an output offset of as much as 25 mV (1% of

the difference in common-mode levels) can result if 1% tolerance

resistors are used. Resistors of 1% tolerance result in a worst-

case input CMRR of approximately 40 dB, a worst-case

differential-mode output offset of 25 mV due to 2.5 V level

shift, and no significant degradation in output balance error.

CALCULATING THE INPUT IMPEDANCE FOR AN

APPLICATION CIRCUIT

The effective input impedance of a circuit depends on whether

the amplifier is being driven by a single-ended or differential

signal source. For balanced differential input signals, as shown

in Figure 54, the input impedance (RIN, dm) between the inputs

(+DIN and −DIN) is simply RIN, dm = 2 × RG.

+VS

ADA4937

+IN

–IN

+DIN

–DIN

VOCM

VOUT, dm

Figure 54. ADA4937-1/ADA4937-2 Configured for Balanced (Differential) Inputs

For an unbalanced, single-ended input signal (see Figure 55),

the input impedance is

 























ADA4937

+VS

VOCM

VOUT, dm

Figure 55. ADA4937-1/ADA4937-2 Configured for Unbalanced

(Single-Ended) Input

The input impedance of the circuit is effectively higher than it is

for a conventional operational amplifier connected as an inverter

because a fraction of the differential output voltage appears at

the inputs as a common-mode signal, partially bootstrapping

the voltage across the Input Gain Resistor RG.

Terminating a Single-Ended Input

This section explains how to properly terminate a single-ended

input to the ADA4937-1/ADA4937-2. Using a simple example

with an input source of 2 V and a source resistor of 50 Ω, four

simple steps must be followed.

The input impedance must be calculated using the formula

267

)

200

(

200

)

(















































ADA4937

+VS

–VS

50Ω

200Ω

VOCM

RIN

267Ω

Figure 56. Single-Ended Input Impedance RIN

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