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 2005 Semtech Corp.

www.semtech.com

SC4901

POWER MANAGEMENT

In all these cases OUTA and XFRA are turned off and, after

a fixed delay of 110 nS, the rectifier MOSFET is turned on.

Both OUTA and XFRA can sink or source + 2A peak current.

Since OUTA has to drive a level shifted MOSFET gate, it

must be used with a pulse transformer. Note that the

common source of the high side FETs presents a negative

voltage to the return pin of any high side drive circuit and

therefore a semiconductor driver is not recommended in

this application. Another pin called XFRA is provided to

simplify the gate drive design with a 1:1 transformer. The

XFRA is configured as a high current open collector

transistor and is turned on and off synchronously with

OUTA. If the maximum duty cycle expected is less than 50%,

the pulse transformer can be connected directly between

OUTA and XFRA. This ensures that the gate is always driven

with PVCC during both on and off periods. A 1A Schottky or

ultrafast rectifier should be connected in reverse across

the XFRA transistor. This is required to discharge the

MOSFET gate rapidly during turn off. Refer to DTO in Fig.

3a) In addition, a smaller signal diode should be connected

from XFRA to PVCC supply to reset the driver transformer.

This diode may be rated to carry the magnetising current

of the drive transformer. Refer DRES in Fig 3a) below.

If maximum duty ratio is more than 50% a ceramic

capacitor C RES may be added in series to the transformer

primary as shown in Fig 3b). The capacitor carries a small

voltage only when duty ratio is more than 50% which

correspondingly reduces the gate drive voltage during the

ON time.

Alternately an additional zener Z RES may be used to reset

the transformer during the OFF time as shown in Fig 3c).

The zener voltage V

V

Note that in this arrangement the OFF voltage applied to

the MOSFET gates increases to ( PVCC + V

Inside the SC4901, the drive circuits are powered by a

separate supply and ground pair, designated as PVCC and

PGND. Adequate and independent noise bypassing of both

AVCC and PVCC to the corresponding grounds is strongly

recommended.

Application Information (Cont.)

Fig 3a. Driving a Pulse Transformer using XFRA and OUTA with < 50% duty ratio

PGN D

DRES

DTO

RGS

OPTION A L

RG

X F R A PIN IS PR OV IDED TO

SIM PLIF Y PU LSE

TR A N SF OR M ER DESIGN

X F R A IS A N OPEN

COLLECTOR THA T TU R N S

ON W HEN OU TA IS ON

F OR OPER A TIN G DU TY

R A TIOS OF 5 0 % THE PU LSE

TR A N SF OR M ER IS

C ON N EC TED DIR EC TLY

B ETW E EN OU TA A N D X F R A

'DR ES' RE SETS THE PU LSE

X F R DU RIN G THE OF F

TIM E.

'DTO' PR OV IDES A HIGH

C U RREN T TU RN OF F P A TH

F OR THE GA TE C HA R GES

OF QS A N D QF

C u rre nt

Se ns e

QR

QF

CT

••

••

ZCD

15

CAO

3

CS -

2

CS +

1

OUT B

6

SSE N

4

XFRA

7

PVCC

9

PGN D

8

VCC

5

GN D

16

OUT A

10

RE F

11

VE A-

12

VE A

13

RCT

14

P W M L O G I C

A N D

O U T P U T

D R I V E R S

TRANS FORM ER

SE CONDARY

SY NC AND RA M P

+

+-

-

L

QS

DVCC

COUT

RZ

RT

PV C C

VSEC

RTN

VOU T

SC 4901

SI N GL E

EN DED

FOR W AR D

CO N VER TOR

C SS

XF R A