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STE2004SDIE2 Datasheet(PDF) 15 Page - STMicroelectronics |
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STE2004SDIE2 Datasheet(HTML) 15 Page - STMicroelectronics |
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15 / 79 page ![]() STE2004S Circuit description 15/79 When MY=0, the icon Row is output on R64 in MUX 65 mode, on R56 in MUX 49, and on R48 in MUX33. When MY=1, and ICON MODE=0, the icon Row is output on R0 whatever the MUX rate. Figure 8. Automatic data RAM writing sequence with V=0 and data RAM normal format (MX=0)(a) Figure 9. Automatic data RAM writing sequence with V=1 and data RAM normal format (MX=0)(a) a. X Carriage=101; Y-Carriage = 8 0123 98 99 100 101 BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 BANK 5 BANK 6 BANK 7 BANK 8 LR0049 01 0123 98 99 100 101 BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 BANK 5 BANK 6 BANK 7 BANK 8 LR0050 |
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