74LVC2G74 datasheet(9/19 Pages) NXP

9 / 19 page

74LVC2G74_3

Product data sheet

Rev. 03 — 9 August 2007

9 of 19

NXP Semiconductors

74LVC2G74

Single D-type ﬂip-ﬂop with set and reset; positive edge trigger

[1]

Typical values are measured at Tamb =25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.

[2]

tpd is the same as tPLH and tPHL.

[3]

CPD is used to determine the dynamic power dissipation (PD in µW).

PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

∑(CL × VCC2 × fo) = sum of outputs.

trec

recovery time

SD or RD; see Figure 8

VCC = 1.65 V to 1.95 V

1.9

VCC = 2.3 V to 2.7 V

1.4

VCC = 2.7 V

1.3

VCC = 3.0 V to 3.6 V

+1.2

−3.0

+1.2

VCC = 4.5 V to 5.5 V

1.0

tsu

set-up time

D to CP; see Figure 7

VCC = 1.65 V to 1.95 V

2.9

VCC = 2.3 V to 2.7 V

1.7

VCC = 2.7 V

1.7

VCC = 3.0 V to 3.6 V

1.3

0.5

1.3

VCC = 4.5 V to 5.5 V

1.1

hold time

D to CP; see Figure 7

VCC = 1.65 V to 1.95 V

1.5

VCC = 2.3 V to 2.7 V

1.0

VCC = 2.7 V

1.0

VCC = 3.0 V to 3.6 V

1.0

0.6

1.0

VCC = 4.5 V to 5.5 V

1.0

fmax

maximum

frequency

CP; see Figure 7

VCC = 1.65 V to 1.95 V

MHz

VCC = 2.3 V to 2.7 V

175

MHz

VCC = 2.7 V

175

MHz

VCC = 3.0 V to 3.6 V

175

280

175

MHz

VCC = 4.5 V to 5.5 V

200

MHz

CPD

power dissipation

capacitance

VI = GND to VCC;

VCC = 3.3 V

[3]

-15-

Table 9.

Dynamic characteristics …continued

Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.

Symbol Parameter

Conditions

−40 °C to +85 °C

−40 °C to +125 °C

Unit

Min

Typ[1]

Max

Min

Max

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