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ADPL40502ACPZ-1.2-R7 Datasheet(PDF) 11 Page - Analog Devices |
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ADPL40502ACPZ-1.2-R7 Datasheet(HTML) 11 Page - Analog Devices |
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11 / 17 page ![]() Data Sheet ADPL40502 analog.com Rev. 0 11 of 17 THEORY OF OPERATION The ADPL40502 is a low noise, low quiescent current, LDO linear regulator that operates from 2.2V to 5.5V and can provide up to 200mA of output current. Drawing a low 290μA of operating supply current (typical) at full load makes the ADPL40502 ideal for battery operated, portable equipment. Shutdown current consumption is typically 0.2µA. Internally, the ADPL40502 consists of a reference, an error amplifier, a feedback voltage divider, and a PMOS pass transistor. Output current is delivered via the PMOS pass device, which is controlled by the error amplifier. The error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. If the feedback voltage is lower than the reference voltage, the gate of the PMOS device pulls lower, allowing more current to pass and increasing the output voltage. If the feedback voltage is higher than the reference voltage, the gate of the PMOS device pulls higher, allowing less current to pass and decreasing the output voltage. An internal pull-down resistor on the EN input holds the input low when the pin is left open. The ADPL40502 is available in seven output voltage options, ranging from 1.2V to 3.3V. The ADPL40502 uses the EN pin to enable and disable the VOUT pin under normal operating conditions. When EN is high, VOUT turns on, and when EN is low, VOUT turns off. For automatic startup, tie EN to VIN. APPLICATIONS INFORMATION Capacitor Selection Output Capacitor The ADPL40502 is designed for operation with small, space-saving ceramic capacitors but can function with most commonly used capacitors as long as care is taken with regard to the effective series resistance (ESR) value. The ESR of the output capacitor affects the stability of the LDO control loop. A minimum of 1µF capacitance with an ESR of 1Ω or less is recommended to ensure the stability of the ADPL40502. Transient response to changes in load current is also affected by output capacitance. Using a larger value of output capacitance improves the transient response of the ADPL40502 to large changes in load current. Figure 23 shows the transient responses for an output capacitance value of 1µF. Derating of ceramic capacitors with DC voltage, temperature, and AC signal must be considered while selecting the output capacitor. Effective capacitance can be 80% lower than the nominal capacitor value. Derating curves are available from all major ceramic capacitor vendors. Figure 23. Output Transient Response, COUT = 1µF CH1 200mA CH2 50mV M20µs A CH1 64mA T 10.00% 1 2 T LOAD CURRENT VOUT |
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