TMP86CS25AFG datasheet(49/194 Pages) TOSHIBA

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Page 39

TMP86CS25AFG

3.3 Interrupt Source Selector (INTSEL)

Each interrupt source that shares the interrupt source level with another interrupt source is allowed to enable the

interrupt latch only when it is selected in the INTSEL register. The interrupt controller does not hold interrupt

requests corresponding to interrupt sources that are not selected in the INTSEL register. Therefore, the INTSEL reg-

ister must be set appropriately before interrupt requests are generated.

The following interrupt sources share their interrupt source level; the source is selected onnthe register INTSEL.

1. INTRXD and INTSIO0 share the interrupt source level whose priority is 10.

2. INTTXD and INTSIO1 share the interrupt source level whose priority is 11.

3. INT3 and INTTC3 share the interrupt source level whose priority is 15.

4. INT5 and INTTC5 share the interrupt source level whose priority is 16.

3.4 Interrupt Sequence

An interrupt request, which raised interrupt latch, is held, until interrupt is accepted or interrupt latch is cleared to

“0” by resetting or an instruction. Interrupt acceptance sequence requires 8 machine cycles (2

µs @16 MHz) after the

completion of the current instruction. The interrupt service task terminates upon execution of an interrupt return

instruction [RETI] (for maskable interrupts) or [RETN] (for non-maskable interrupts). Figure 3-1 shows the timing

chart of interrupt acceptance processing.

3.4.1 Interrupt acceptance processing is packaged as follows.

a. The interrupt master enable flag (IMF) is cleared to “0” in order to disable the acceptance of any fol-

lowing interrupt.

b. The interrupt latch (IL) for the interrupt source accepted is cleared to “0”.

c. The contents of the program counter (PC) and the program status word, including the interrupt master

enable flag (IMF), are saved (Pushed) on the stack in sequence of PSW + IMF, PCH, PCL. Mean-

while, the stack pointer (SP) is decremented by 3.

d. The entry address (Interrupt vector) of the corresponding interrupt service program, loaded on the vec-

tor table, is transferred to the program counter.

e. The instruction stored at the entry address of the interrupt service program is executed.

Note:When the contents of PSW are saved on the stack, the contents of IMF are also saved.

Interrupt source selector

INTSEL

(003EH)

76543

210

IL9ER

IL10ER

IL14ER

IL15ER

(Initial value: *00* **00)

IL9ER

Selects INTRXD or INTSIO0

0: INTRXD

1: INTSIO0

R/W

IL10ER

Selects INTTXD or INTSIO1

0: INTTXD

1: INTSIO1

R/W

IL14ER

Selects INT3 or INTTC3

0: INT3

1: INTTC3

R/W

IL15ER

Selects INT5 or INTTC5

0: INT5

1: INTTC5

R/W

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