TLP554

2007-10-01

4

CHARACTERISTIC

SYMBOL

TEST

CIRCUIT

TEST CONDITION

MIN.

TYP.

MAX.

UNIT

L

→H

tpLH

IF=7.5

→0mA

⎯

60

120

Propagation Delay Time

H

→L

tpHL

RL=350

Ω

CL=15pF

IF=0

→7.5mA

⎯

60

120

ns

Output Rise Time(10-90%)

tr

⎯

30

⎯

Output Fall Time(10-90%)

tf

1

IF=7.5

→0 / 0→7.5mA

RL=350Ω, CL=15pF

⎯

30

⎯

ns

tELH

VE=0.5

→3.0V

⎯

25

⎯

Enable Propagation Delay Time

tEHL

2

RL=350

Ω

CL=15pF

IF=7.5 mA

VE=3.0

→0.5V

⎯

25

⎯

ns

Common Mode Transient

Immunity at Hight Level

Outout

IF=0mA

VO(Min)=2.0V

1000

10000

⎯

Common Mode Transient

Immunity at Low Level

Outout

3

VCM=400V

RL=350

Ω

(Note 7)

IF=7.5mA

VO(Max)=0.8V

-1000

-10000

⎯

V/

μs

ּ

The maximum tolerable rate of rise of the common mode voltage to ensure

the output will remain in the high state(i.e.,VOUT>2.0V)

ּ

The maximum tolerable rate of fall of the common mode voltage to ensure

the output will remain in the low output state(i.e.,VOUT<0.8V)

Measured in volts per microsecond(V/

μs).

(Note 8) Maximum electrostatic discharge voltage for any pins:180V(C=200pF,R=0)