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STM32F412REH6 Datasheet(PDF) 39 Page - STMicroelectronics |
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STM32F412REH6 Datasheet(HTML) 39 Page - STMicroelectronics |
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39 / 201 page ![]() DocID028087 Rev 7 39/201 STM32F412xE/G Functional overview 42 The DFSDM peripheral supports: • 4 multiplexed input digital serial channels: – configurable SPI interface to connect various SD modulator(s) – configurable Manchester coded 1 wire interface support – PDM (Pulse Density Modulation) microphone input support – maximum input clock frequency up to 20 MHz (10 MHz for Manchester coding) – clock output for SD modulator(s): 0...20 MHz • alternative inputs from 4 internal digital parallel channels (up to 16 bit input resolution): – internal sources: device memory data streams (DMA) • 2 digital filter modules with adjustable digital signal processing: –Sincx filter: filter order/type (1...5), oversampling ratio (up to 1...1024) – integrator: oversampling ratio (1...256) • up to 24-bit output data resolution, signed output data format • automatic data offset correction (offset stored in register by user) • continuous or single conversion • start-of-conversion triggered by – software trigger – internal timers – external events – start-of-conversion synchronously with first digital filter module (DFSDM1FLT0) • analog watchdog feature: – low value and high value data threshold registers – dedicated configurable Sincx digital filter (order = 1...3, oversampling ratio = 1...32 – input from digital output data or from selected input digital serial channels – continuous monitoring independently from standard conversion • short circuit detector to detect saturated analog input values (bottom and top range): – up to 8-bit counter to detect 1...256 consecutive 0’s or 1’s on serial data stream – monitoring continuously each input serial channel • break signal generation on analog watchdog event or on short circuit detector event • extremes detector: – storage of minimum and maximum values of final conversion data – refreshed by software • DMA capability to read the final conversion data • interrupts: end of conversion, overrun, analog watchdog, short circuit input serial channel clock absence • “regulator” or injected” conversions: – “regular” conversions can be requested at any time or even in continuous mode without having any impact on the timing of “injected” conversions – “injected” conversions for precise timing and with high conversion priority. |
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