Electronic Components Datasheet Search
  British  ▼
ALLDATASHEET.CO.UK

X  

SCD55104A Datasheet(PDF) 8 Page - OSRAM GmbH

Part # SCD55104A
Description  Dot Addressable Intelligent Display짰 Devices
PDF  17 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  OSRAM [OSRAM GmbH]
Direct Link  http://www.osram.com
Logo OSRAM - OSRAM GmbH

SCD55104A Datasheet(HTML) 8 Page - OSRAM GmbH

Back Button SCD55104A Datasheet HTML 4Page - OSRAM GmbH SCD55104A Datasheet HTML 5Page - OSRAM GmbH SCD55104A Datasheet HTML 6Page - OSRAM GmbH SCD55104A Datasheet HTML 7Page - OSRAM GmbH SCD55104A Datasheet HTML 8Page - OSRAM GmbH SCD55104A Datasheet HTML 9Page - OSRAM GmbH SCD55104A Datasheet HTML 10Page - OSRAM GmbH SCD55104A Datasheet HTML 11Page - OSRAM GmbH SCD55104A Datasheet HTML 12Page - OSRAM GmbH Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 17 page
background image
SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A
2006-02-20
8
The following explains how to format the serial data to be loaded
into the display. The user supplies a string of bit mapped decoded
characters. The contents of this string is shown in Figure „Loading
Serial Character Data a“ (page 8). Figure „Loading Serial Charac-
ter Data b“ (page 8) shows that each character consist of six 8 bit
words. The first word encodes the display character location and
the succeeding five bytes are row data. The row data represents
the status (On, Off) of individual column LEDs. Figure „Loading
Serial Character Data c“ (page 8) shows that each 8 bit word is
formatted to include a three bit Operational Code (OPCODE)
defined by bits D7–D5 and five bits (D4–D0) representing Column
Data, Character Address, or Control Word Data.
Figure „Loading Serial Character Data d“ (page 8) shows the
sequence for loading the bytes of data. Bringing the LOAD line low
enables the serial register to accept data. The shift action occurs
on the low to high transition of the serial data clock (SDCLK). The
least significant bit (D0) is loaded first. After eight clock pulses the
LOAD line is brought high. With this transition the OPCODE is
decoded. The decoded OPCODE directs D4–D0 to be latched in
the Character Address register, stored in the RAM as Column
data, or latched in the Control Word register. The control IC
requires a minimum 600 ns delay between successive byte loads.
As indicated in Figure „Loading Serial Character Data a“ (page 8),
a total of 660 clock cycles (60-8 bit words) are required to load all
ten characters into the display.
The Character Address Register bits, D4–D0 (Table „Load Charac-
ter Address“ (page 9)) and Row Address Register bits, D7–D5
(Table „Load Column Data“ (page 9)) direct the Column Data bits,
D4–D0 (Table „Load Column Data“ (page 9)) to specific RAM loca-
tion. Table „Character ’D’“ (page 8) shows the Row Address for the
example character “D.” Column data is written and read asynchro-
nously from the 250 bit RAM. Once loaded the internal oscillator
and character multiplexer reads the data from the RAM. These
characters are row strobed with column data as shown in Figures
„Row and Column Location“ (page 9) and „Row Strobing“
(page 10). The character strobe rate is determined by the internal
or user supplied external MUX Clock and the IC’s ÷ 320 counter.
Loading Serial Character Data
Character “D”
Op code
D7
D6 D5
Column Data
D4
D3
D2
D1
D0
C0
C1
C2
C3
C4
Hex
Row 0
00
0
11
1
1
0
1E
Row 1
00
1
10
0
0
1
31
Row 2
01
0
10
0
0
1
51
Row 3
01
1
10
0
0
1
71
Row 4
10
0
11
1
1
0
9E
Character 0
Character 1
Character 2
Character 3
Character 4
Character 5
Character 6
Character 7
Character 8
Character 9
660 Clock Cycles, 132
µs
Example: Serial Clock = 5 MHz, Clock Period = 200 ns
Time between LOADS
LOAD
Serial
Clock
DATA
Clock
Period
t
0
D0
D1
D2
D3
D4
D5
D6
D7
11 Clock Cycles, 2.2 s
Time
Between
Loads
OPCODE
Character Address
OPCODE
Column Data
D0
C4
D1
C3
D2
C2
D3
C1
D4
C0
Character 0
Address
Row 0 Column
Data
66 Clock Cycles, 13.2
µs
Row 1 Column
Data
Row 2 Column
Data
Row 3 Column
Data
Row 4 Column
Data
D0
0
D1
0
D2
0
D3
0
D4
0
D5
1
D6
0
D7
0
D5 D6 D7
a.
b.
c.
d.
11 Clock Cycles, 2.2 s
600 ns(min.)
Time
Between
Loads
600 ns(min.)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com